Method of manufacture of a linear spring electromagnetic grill ink jet printer

1. A method of manufacturing an ink jet printhead which includes: providing a substrate; depositing a doped layer on the substrate and etching said layer to create an array of nozzles on the substrate with a nozzle chamber in communication with each nozzle; and utilising planar monolithic deposition, lithographic and etching processes to create a magnetically responsive shutter for openably closing each nozzle chamber, an electromagnetically operable device which acts on the shutter for opening and closing the shutter on demand for controlling ejection of ink from the nozzle and an urging means for urging the shutter to its rest position.

2. A method of manufacturing an ink jet printhead as claimed in claim 1 wherein multiple ink jet printheads are formed simultaneously on the substrate.

3. A method of manufacturing an ink jet printhead as claimed in claim 1 wherein said substrate is a silicon wafer.

4. A method of manufacturing an ink jet printhead as claimed in claim 1 wherein integrated drive electronics are formed on the same substrate.

5. A method of manufacturing an ink jet printhead as claimed in claim 4 wherein said integrated drive electronics are formed using a CMOS fabrication process.

6. A method of manufacturing an ink jet printhead as claimed in claim 1 wherein ink is ejected from said substrate normal to said substrate.

7. A method of manufacture of a drop on demand ink jet printhead arrangement including a series of nozzle chambers, said method comprising the steps of: (a) utilizing an initial semiconductor wafer having an electrical circuitry layer and a buried epitaxial layer formed thereon; (b) etching a nozzle chamber aperture in said electrical circuitry layer in communication with a nozzle chamber in said semiconductor wafer; (c) depositing a first sacrificial layer which fills said nozzle chamber; (d) depositing and etching a first inert material layer, said first inert material layer including a grill structure over said nozzle chamber aperture and vias for electrical interconnection of subsequent layers with said electrical circuitry layer; (e) depositing and etching a first conductive material layer, said conductive material layer including a series of lower electrical coil portions interconnected with said electrical circuitry layer; (f) depositing and etching a second inert material layer over said first conductive material layer, said second inert material layer including predetermined vias for interconnection of said first conductive material layer with subsequent layers; (g) depositing and etching a second sacrificial layer including etching a mould for a solenoid, a fixed magnetic pole, and a linear spring anchor; (h) depositing and etching a high saturation flux material layer to form said series of fixed magnetic poles, a linear spring, said linear spring anchor and a displaceable shutter for openably closing its associated nozzle chamber and on which the linear spring acts for biasing the shutter to a rest position; (i) depositing and etching a third inert material layer over said high saturation flux material layer, said third inert material layer including predetermined vias for interconnection of lower conductive material layers with subsequent conductive material layers; (j) depositing and etching a second conductive material layer, said second conductive material layer including side electrical coil portions surrounding said series of fixed magnetic poles interconnected with said first conductive material layer, (k) depositing and etching a third conductive material layer, said third conductive material layer including a top electrical coil portion interconnected with said second conductive material layer; (l) depositing and etching a top inert material layer as a corrosion barrier; (m) back etching said wafer to said epitaxial layer; (n) etching a nozzle aperture in said epitaxial layer; and (o) etching away said sacrificial layer.

8. A method as claimed in claim 7 wherein said epitaxial layer is utilized as an etch stop in said step (b).

9. A method as claimed in claim 7 wherein said step (b) comprises a crystallographic etch of said wafer.

10. A method as claimed in claim 7 wherein said high saturation flux material comprises substantially a cobalt nickel iron alloy.

11. A method as claimed in claim 9 wherein said conductive layers comprise substantially copper.

12. A method as claimed in claim 7 wherein said inert material layers comprise substantially silicon nitride.

13. A method as claimed in claim 7 further including the step of depositing corrosion barriers over portions of said arrangement so as to reduce corrosion effects.

14. A method as claimed in claim 7 wherein said wafer comprises a double side polished CMOS wafer.

15. A method as claimed in claim 7 wherein at least said steps (m) and (o) are also utilized to simultaneously separate said wafer into separate printheads.