Legal claims defining the scope of protection, as filed with the USPTO.
1. A method of manufacturing semiconductor devices comprising: a) forming a thin layer on a semiconductor substrate: b) coating photoresist on the thin layer; c) forming a photoresist pattern in the photoresist on the semiconductor substrate; d) hardening the photoresist pattern; and e) etching the thin layer by using the hardened photoresist pattern as an etch mask, said hardening of the photoresist pattern comprising injecting ions into the photoresist pattern at an angle greater than zero degrees with respect to vertical, so that the ions are implanted into the photoresist pattern and prevented from being implanted into the semiconductor substrate.
2. The method of manufacturing semiconductor devices of claim 1, wherein a gas used for injecting the ions is one selected from a group consisting of an inert gas, a P-type gas, and an N-type gas.
3. The method of manufacturing semiconductor devices of claim 2, where the gas is BF.sub.3.
4. The method of manufacturing semiconductor devices of claim 2, where the gas is selected from a group consisting of PH.sub.3 and PF.sub.3.
5. The method of manufacturing semiconductor devices of claim 2, wherein a density of implanted ions is maximum at a depth equal to 1/2 of a height of the photoresist pattern.
6. The method of manufacturing semiconductor devices of claim 2, wherein an ion-implantation dose is between 1E15 to 5E16 ions/cm.sup.2.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
Unknown
March 13, 2001
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