Trench isolated bipolar transistor structure integrated with CMOS technology

1. A process for forming a bipolar device comprising the steps of: performing an isolation implant of dopant of a first conductivity type into a semiconductor substrate to form an isolation layer; thermally driving the isolation implanted dopant into the substrate; performing a first masked buried layer implant of dopant of the first conductivity type into the semiconductor substrate to form a first buried layer; performing a second masked buried layer implant of dopant of the second conductivity type into the semiconductor substrate outside of the first buried layer to form a second buried layer; creating additional lightly doped semiconductor material of the first conductivity type on top of the substrate; forming a first sinker of the first conductivity type extending from a surface of the additional semiconductor material to the isolation layer; forming a second sinker of the second conductivity type extending from the surface of the additional semiconductor material to the second buried layer; performing a first well implant of dopant of the second conductivity type into the additional semiconductor material above the second buried layer to form a first well, the first well including the second sinker; forming a base region of the first conductivity type within the first well; and forming an emitter of the second conductivity type within the base region.

2. The process according to claim 1 wherein the second masked buried layer implant is self-aligned to the first masked buried layer implant.

3. The process according to claim 1 further comprising the step of performing a second well implant of dopant of the first conductivity type into the additional semiconductor material outside of the first well to form a second well, the second well including the first sinker.

4. The process according to claim 3 wherein the second well implant is self-aligned to the first well implant.

5. The process of claim 1 wherein the semiconducting material is single crystal silicon, and the step of forming an emitter comprises forming a diffused polysilicon emitter, the diffused polysilicon emitter including a polysilicon contact component formed on the surface of the additional semiconductor material over the base region, and a single crystal emitter component formed within the base region.

6. A process for forming a bipolar device comprising the steps of: performing a high energy implant of dopant of a first conductivity type into a semiconductor material to form an isolation layer at a depth in the semiconductor material; performing a first masked buried layer implant of dopant of the first conductivity type into the semiconductor substrate to form a first buried layer above the isolation layer; performing a second masked buried layer implant of dopant of the second conductivity type into the semiconductor substrate outside of the first buried layer to form a second buried layer above the isolation layer; forming a first sinker of the first conductivity type extending from a surface of the semiconductor material to the isolation layer; forming a second sinker of the second conductivity type extending from the surface of the semiconductor material to the second buried layer; performing a first well implant of dopant of the second conductivity type into the semiconductor material above the second buried layer to form a first well, the first well including the second sinker; forming a base region of the first conductivity type within the first well; and forming an emitter region of the second conductivity type within the base region.

7. The process according to claim 6 wherein the second masked buried layer implant is self-aligned to the first masked buried layer implant.

8. The process according to claim 6 further comprising the step of performing a second well implant of dopant of the first conductivity type into the semiconductor material above the first buried layer to form a second well, the second well including the first sinker.

9. The process according to claim 8 wherein the second masked well implant is self-aligned to the first well implant.

10. The process according to claim 6 wherein the semiconducting material is single crystal silicon, and the step of forming an emitter comprises forming a diffused polysilicon emitter, the diffused polysilicon emitter having a polysilicon emitter contact component formed on the surface of the semiconductor material over the base region, and having a single crystal emitter component formed within the base region.