A first structure of a circuit configuration and a first alignment structure are produced in the region of a surface of a first substrate. The first alignment structure scatters electron beams differently than its surroundings. A second substrate, which is more transmissive to electron beams than the first alignment structure, is connected to the first substrate in such a way that the second substrate is disposed above the surface of the first substrate. In order to align a mask with respect to the first structure, a position of the first alignment structure is determined with the aid of electron beams. With the aid of the mask, at least one second structure of the circuit configuration is produced in the region of an uncovered upper surface of the second substrate. The first structure may be a metallic line encapsulated by insulating material. A contact may connect the first structure to the second structure. With the aid of electron beam lithography, at least one second alignment structure may be produced in the region of the upper surface of the second substrate, using which the mask is aligned.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method for fabricating an integrated circuit configuration, which comprises: providing a first substrate having a surface; producing at least one first structure in a region of the surface of the first substrate; producing at least one first alignment structure in the region of the surface of the first substrate, the at least one first alignment structure scatters electron beams differently than its surroundings; applying a second substrate, being more transmissive to the electron beams than the at least one first alignment structure, above the surface of the first substrate; determining a position of the at least one first alignment structure with an aid of the electron beams for assisting in aligning at least one mask with respect to the at least one first structure; and producing, with the aid of the at least one mask, at least one second structure in a region of an upper surface of the second substrate, the upper surface being remote from the first substrate.
2. The method according to claim 1, which comprises producing the at least one first structure as a metallic line.
3. The method according to claim 2, which comprises: producing the at least one second structure as a semiconductor component; and producing at least one further semiconductor component in the second substrate such that the at least one first structure connects the further semiconductor component to the semiconductor component.
4. The method according to claim 1, which comprises: using a further mask for producing a contact hole in the second substrate; and filling the contact hole with a conductive material for forming a contact, the at least one second structure is electrically connected to the at least one first structure via the contact.
5. The method according to claim 4, which comprises: producing, before the producing step of the at least one second structure, at least one second alignment structure in the region of the upper surface of the second substrate with an aid of electron beam lithography, the at least one second alignment structure being used for aligning at least one of said at least one mask and said further mask; and producing said at least one second alignment structure at a defined distance, running parallel to the upper surface of the at least one second structure, from a projection of the at least one first alignment structure onto the upper surface of the second substrate.
6. The method according to claim 1, which comprises producing the at least one first structure with an aid of optical lithography.
7. The method according to claim 1, which comprises: applying a first insulating layer on the surface of the first substrate; and producing at least one of the at least one first alignment structure and the at least one first structure in the first insulating layer such that at least one of the at least one first alignment structure and the at least one first structure do not adjoin the first substrate.
8. The method according to claim 7, which comprises: applying and planarizing a second insulating layer above the at least one first structure; applying and planarizing a third insulating layer on a lower surface, opposite to the upper surface, of the second substrate; joining the first substrate and the second substrate such that the second insulating layer adjoins the third insulating layer; and heat treating the second insulating layer and the third insulating layer for permanently connecting the second insulating layer to the third insulating layer.
9. The method according to claim 8, which comprises thinning the second substrate by grinding after being connected to the first substrate and before the step of producing the at least one second structure.
10. The method according to claim 1, which comprises producing the at least one second structure with an aid of optical lithography.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
February 4, 2000
June 5, 2001
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