A dynamic incrementer, implemented in the Self Resetting Complementary Metal Oxide Semiconductor (SRCMOS) circuit family, which internally performs single rail calculations and which generates the dual rail result using a strobing technique. The carry-lookahead function is implemented with an OR tree using the complement input signals, resulting in a very fast and economical incrementer.
Legal claims defining the scope of protection, as filed with the USPTO.
1. An incrementing circuit comprising: an input latch for receiving a pulsed input data and outputting a static complement of the pulsed input data, the pulsed input data representing a number to be incremented; a carry-lookahead circuit, coupled to receive said static complement of the pulsed input data, said carry-lookahead circuit for generating a carry signal from the number to be incremented; and a summing circuit coupled to receive the carry signals from the carry-lookahead circuit and the pulsed input data representing the number to be incremented, said summing circuit for summing said carry signals and said pulsed input data and producing a pulsed output representing a sum.
2. The circuit of claim 1, further comprising a strobe circuit for generating a triggering output to trigger said summing circuit to add the carry signals and the pulsed input data.
3. The circuit of claim 1, wherein the carry lookahead circuit is an OR tree.
4. The circuit of claim 3, wherein the OR tree evaluates the carry signals using negative logic.
5. The circuit of claim 1, wherein the OR tree is implemented using dynamic logic.
6. The circuit of claim 5, wherein the dynamic logic is self-resetting, and the reset signal is triggered locally.
7. The circuit of claim 5, wherein a reset provided to the OR tree is globally generated.
8. The system of claim 1, wherein the summing circuit is implemented using dynamic logic.
9. A method for incrementing a number represented by a pulsed electrical signal, comprising steps of: converting the pulsed electrical signal representing the number into a static signal; using a complement of the pulsed electrical signal to determine carries required for incrementing the number; generating a pulsed data representation of the carries; and summing the static signal and the pulsed data representation of the carries to form a pulsed representation of the incremented number.
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January 4, 1996
August 21, 2001
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