Current sense amplifiers include a pair of differential output signal lines and a current sensor electrically coupled to the pair of differential output signal lines. A first equalization device is also provided. The first equalization device is electrically coupled to the pair of differential output signal lines and is responsive to a sense amplifier enable signal (SAEN). In addition, according to a preferred aspect of the present invention, a second equalization device is also provided to reduce the likelihood that the differential outputs of the current sense amplifier will oscillate during sense and amplify operations. This second equalization device is also electrically coupled to the pair of differential output signal lines, however, the second equalization device is not responsive to the sense amplifier enable signal. Instead, the second equalization device is preferably responsive to a power supply signal (e.g., Vcc) and/or reference signal (e.g., Vss) and performs a constant or variable equalization function when the sense amplifier is active.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A current sense amplifier, comprising: a pair of differential input signal lines; a current source electrically coupled to said pair of differential input signal lines; a pair of differential output signal lines; a current sensor having a first pair of terminals electrically coupled to said pair of differential input signal lines and a second pair of terminals electrically coupled to said pair of differential output signal lines; a first equalization device that is electrically coupled to said pair of differential output signal lines and is responsive to a sense amplifier enable signal; and a second equalization device that is electrically coupled to said pair of differential output signal lines and is not responsive to the sense amplifier enable signal.
2. The sense amplifier of claim 1, wherein said second equalization device electrically connects said pair of differential output signal lines together by a variable resistor having a resistance value that is a function of a magnitude of a power supply signal, when said current sensor is active.
3. The sense amplifier of claim 1, further comprising a current sink that is electrically coupled to said pair of differential output signal lines and is responsive to the sense amplifier enable signal.
4. The sense amplifier of claim 3, wherein said second equalization device comprises: a voltage divider having a reference node; and a pass transistor having source and drain regions electrically coupled to said pair of differential output signal lines and a gate electrode electrically coupled to the reference node.
5. The sense amplifier of claim 1, wherein said second equalization device comprises: a voltage divider having a reference node; and a pass transistor having source and drain regions electrically coupled to said pair of differential output signal lines and a gate electrode electrically coupled to the reference node.
6. The sense amplifier of claim 1, wherein said second equalization device comprises a pass transistor having source and drain regions electrically coupled to said pair of differential output signal lines and a gate electrode electrically coupled to a reference potential having a sufficient magnitude to bias the pass transistor in a conductive state.
7. A current sense amplifier, comprising: a pair of differential output signal lines; a current sensor electrically coupled to said pair of differential output signal lines; a first equalization device that is electrically coupled to said pair of differential output signal lines and is responsive to a sense amplifier enable signal; and a second equalization device that is electrically coupled to said pair of differential output signal lines and is not responsive to the sense amplifier enable signal, said second equalization device comprising a pair of diodes connected in antiparallel.
8. The sense amplifier of claim 7, wherein the diodes comprise MOS transistors.
9. A current sense amplifier, comprising: a pair of differential input signal lines; a pair of differential output signal lines; a current sensor having a first pair of terminals electrically coupled to said pair of differential input signal lines and a second pair of terminals electrically coupled to said pair of differential output signal lines; and an equalization device that is electrically coupled to said pair of differential output signal lines, said equalization device comprising a voltage divider having a reference node that is maintained at a first voltage that varies as a function of a magnitude of a power supply voltage, and a first MOS transistor having source and drain regions electrically connected to said pair of differential output signal lines and a gate electrode electrically coupled to the reference node of the voltage divider so that a resistance between the source and drain regions of the first MOS transistor varies inversely with the magnitude of the power supply voltage.
10. The current sense amplifier of claim 9, wherein the voltage divider comprises second and third MOS transistors electrically connected in series between a reference signal line and a power supply signal line.
11. The current sense amplifier of claim 10, wherein the second MOS transistor is configured as a diode.
12. A sense amplifier, comprising: a pair of differential input signal lines; a pair of differential output signal lines; a current sensor having a first pair of terminals electrically coupled to said pair of differential input signal lines and a second pair of terminals electrically coupled to said pair of differential output signal lines; and an equalization device that electrically connects said pair of differential output signal lines together when said current sensor is active, by a variable resistor having a resistance value that is a function of a magnitude of a power supply signal.
13. The sense amplifier of claim 12, wherein the variable resistor has a resistance value that is inversely proportional to the magnitude of the power supply signal.
14. A sense amplifier of a semiconductor device, enabled by an enable signal, receiving a pair of complementary signals from a pair of data input lines, amplifying them, and outputting amplified signals to a pair of data output lines, comprising: a current source for supplying current to the pair of data input lines when the enable signal is activated; a sensor for sensing a current difference between the pair of data input lines, converting the result into a voltage difference, and outputting the voltage difference to the pair of data output lines; a first equalizer for equalizing the pair of data output lines for initialization when the enable signal is deactivated; a second equalizer for equalizing the pair of data output lines for preventing oscillation of the output signals output to the pair of data output lines; and a current sink for letting the current of the pair of data output lines flow to a ground port when the enable signal is activated.
15. The sense amplifier of claim 14, wherein the second equalizer comprises: an NMOS equalizing transistor having a source connected to one of the pair of data output lines and having a drain connected to the other of the pair of data output lines; a first NMOS clamp transistor to the gate and the drain of which a power supply voltage is applied and the source of which is connected to the gate of the NMOS equalizing transistor; and a second NMOS clamp transistor the drain of which is connected to the gate of the NMOS equalizing transistor, to the gate of which the power supply voltage is applied, and having a source, a ground voltage applied to the source.
16. The sense amplifier of claim 14, wherein the second equalizer comprises an NMOS equalizing transistor having a source connected to one of the pair of data output lines, and having a drain connected to the other of the pair of output lines, and having a gate, the power supply voltage applied to the gate.
17. The sense amplifier of claim 14, wherein the second equalizer comprises a PMOS equalizing transistor the source of which is connected to one of the pair of data output lines, the drain of which is connected to the other of the pair of output lines, to the gate of which a ground voltage is applied.
18. The sense amplifier of claim 14, wherein the second equalizer comprises: a first NMOS clamp transistor the drain and the gate of which are connected to one of the pair of data output lines and the source of which is connected to the other of the pair of output lines; and a second NMOS clamp transistor the drain and the gate of which are connected to the other of the pair of data output lines and the source of which is connected to one of the pair of output lines.
19. The sense amplifier of claim 14, wherein the second equalizer comprises: a first PMOS clamp transistor the drain and the gate of which are connected to one of the pair of data output lines and the source of which is connected to the other of the pair of data output lines; and a second PMOS clamp transistor the drain and the gate of which are connected to the other and the source of which is connected to one of the pair of data output.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
December 23, 1999
August 28, 2001
Browse 5M+ US patents with plain-English claim translations and AI-generated analysis.