The present invention automatically determines the size of an EEPROM in a circuit. A controller is connected to the EEPROM with both a data to the EEPROM connection and a data from the EEPROM connection. The controller begins to send logical low address bits over the data to the EEPROM connection. After each address bit is transmitted, the controller increments the value of a counter. The controller continually monitors the data from the EEPROM connection to determine when the EEPROM has been successfully addressed. Once the EEPROM receives the appropriate number of address bits to fully address the first address location, the EEPROM drives the data from connection low. The controller then uses the value of the counter to determine the size of the EEPROM. The controller may either calculate the size of the EEPROM or use the value of the counter in a look-up table.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method of determining a size of an EEPROM comprising: a) providing an address bit to the EEPROM; b) incrementing a value of a counter c) repeating steps (a) and (b) until the EEPROM responds; and d) determining the size of the EEPROM from the value of the counter.
2. The method of claim 1, wherein the address bit is a logical low.
3. The method of claim 1, wherein the EEPROM responds by driving a data out pin low.
4. The method of claim 3, wherein the data out pin is biased high.
5. The method of claim 1, wherein the EEPROM size is in a range from about 256 bits to 64 Kbits.
6. The method of claim 1, wherein the size of the EEPROM is determined from a look-up table.
7. The method of claim 1, further comprising the step of determining that no EEPROM is present or the EEPROM is malfunctioning if the number of address bits provided exceeds a predetermined value.
8. The method of claim 1, further comprising: comparing the value of the counter to a predetermined value; and determining the EEPROM is not present if the value of the counter exceeds the predetermined value.
9. A circuit for automatically determining the size of an EEPROM comprising: a controller; a data-in line adapted to be connected to the EEPROM, wherein the controller transmits an address bit over the data-in line; a counter which is incremented after each address bit is transmitted; and a data-out line adapted to be connected to the EEPROM, wherein the controller monitors the data-out line to determine when the EEPROM has been addressed, the controller determining the size of the EEPROM from the counter after the EEPROM has been addressed.
10. The circuit of claim 9, wherein the address bit transmitted over the data-in line is a logical low.
11. The circuit of claim 9, wherein the EEPROM drives the data-out line low after being addressed.
12. The circuit of claim 9, wherein the data-out line is biased high.
13. The circuit of claim 9, wherein the EEPROM size is in a range from about 256 bits to 64 Kbits.
14. The circuit of claim 9, wherein the size of the EEPROM is determined from a look-up table.
15. The circuit of claim 9, wherein the controller compares the value of the counter to a predetermined maximum value and determines the EEPROM is not present if the value of the counter exceeds the predetermined maximum value.
16. A method of determining a size of an EEPROM comprising: providing a series of address bits to the EEPROM; detecting a response from the EEPROM; and determining the size of the EEPROM from a number of address bits provided to the EEPROM.
17. The method of claim 16, wherein the address bit is a logical low.
18. The method of claim 16, wherein the EEPROM responds by driving a data out pin low.
19. The method of claim 16, further comprising the step of incrementing a counter for each address bit provided.
20. The method of claim 16, further comprising the step of determining that no EEPROM is present or the EEPROM is malfunctioning if the number of address bits provided exceeds a predetermined value.
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December 30, 1999
October 2, 2001
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