Patentable/Patents/US-6312994
US-6312994

Semiconductor device and method for fabricating the same

PublishedNovember 6, 2001
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

A method for fabricating a semiconductor device comprises the step of forming an interconnection 18 having the upper surface covered with an insulation film 20 on a base substrate 10, the step of sequentially depositing an insulation film 24 and an insulation film 26 on the base substrate 10 with the interconnection 18 formed on, the step of etching the insulation film 26 with the insulation film 24 as a stopper to form openings in a region containing a region where the interconnection 18 is formed, and the step of etching the insulation film 24 in the opening to form sidewall insulation films 30 of the insulation film 24 on the side walls of the interconnection 18 and form contact holes 34, 36 to be connected to the base substrate 10 in alignment with the interconnection 18.

Patent Claims
8 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A method for fabricating a semiconductor device comprising: a first interconnection forming step of forming a first interconnection having an upper surface covered with a first insulation film on a base substrate; an insulation film depositing step of sequentially depositing a second insulation film and a third insulation film on the base substrate with the first interconnection formed on; a resist pattern forming step of forming a resist pattern having an opening, the opening being formed over the first interconnection and extending over two contact regions of the base substrate, said two contact regions being adjacent to each other sandwiching the first interconnection therebetween; a third insulation film etching step of etching the third insulation film with the resist pattern as a mask and the second insulation film as a stopper; and a second insulation film etching step of etching the second insulation film with the resist pattern as a mask to form sidewall insulation films of the second insulation film on the side walls of the first interconnection and to form in self-alignment with the first interconnection two contact holes to be connected to the base substrate on each side of the first interconnection.

2

2. A method for fabricating a semiconductor device according to claim 1, wherein the method further comprises, prior to the first interconnection forming step, a device isolation film forming step of forming a device isolation film on the base substrate; and a device isolation film removing step of removing the device isolation film until a surface of a device region defined by the device isolation film has a height substantially equal to the device isolation film.

3

3. A method for fabricating a semiconductor device according to claim 1, wherein the method further comprises, prior to the first interconnection forming step, a device isolation film forming step of forming a device isolation film on the base substrate; a first conducting film depositing step of depositing a first conducting film on the base substrate with the device isolation film formed on; and a conducting film burying step of polishing a surface of the base substrate with the first conducting film formed on until the device isolation film is exposed to bury the first conducting film in the device region defined by the device isolation film and planarize a surface of the base substrate, and wherein in the first interconnection forming step, the first conducting film under the first interconnection is processed in the substantially same pattern as the first interconnection.

4

4. A method for fabricating a semiconductor device according to claim 1, wherein the method further comprises, after the insulation film depositing step, an insulation film removing step of planarly retreating a surface of the third insulation film and the second insulation film to expose the first insulation film on the first interconnection.

5

5. A method for fabricating a semiconductor device according to claim 1, wherein the method further comprises, after the insulation film depositing step, an insulation film removing step of retreating a surface of the third insulation film to expose a part of the second insulation film on the first interconnection.

6

6. A method for fabricating a semiconductor device according to claim 5, wherein the method further comprises, prior to the first interconnection forming step, a device isolating step of forming a device isolation film on the base substrate, and wherein in the first interconnection forming step, the first interconnection is formed on the device region defined by the device isolation film and on the device isolation film; and in the insulation film removing step, the third insulation film is retreated until the second insulation film formed on the first interconnection on the device region is exposed.

7

7. A method for fabricating a semiconductor device according to claim 5, wherein the method further comprises, after the contact hole forming step, a second interconnection forming step of forming a second interconnection buried in the opening and connected to the base substrate.

8

8. A method for fabricating a semiconductor device according to claim 7, wherein in the second interconnection forming step, the second interconnection which contains an impurity, which donates to electric conductivity of the base substrate, is formed and the impurity dopes into the base substrate by diffusion from the second interconnection.

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Patent Metadata

Filing Date

August 21, 1997

Publication Date

November 6, 2001

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