Patentable/Patents/US-6320655
US-6320655

Defect-position identifying method for semiconductor substrate

PublishedNovember 20, 2001
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

A defect-position identifying method for a semiconductor substrate comprises the steps of: forming at least three reference points on a semiconductor substrate; detecting the reference points and a defect on the semiconductor substrate by means of a first evaluating system, which is provided for evaluating the defect on the semiconductor substrate, to measure coordinate values of the reference points and the defect in a system of coordinates of the first evaluating system; detecting the reference points on the semiconductor substrate by means of a second evaluating system, which is provided for evaluating the defect on the semiconductor substrate, to measure coordinate values of the reference points in a system of coordinates of the second evaluating system; determining an affine transformation for transforming the system of coordinates of the first evaluating system to the system of coordinates of the second evaluating system on the basis of the coordinate values of each of the reference points in the first and second evaluating systems; and identifying the position of the defect in the system of coordinates of the second evaluating system on the basis of the determined affine transformation and the coordinate values of the defect in the system of coordinates of the first evaluating system. Thus, it is possible to precisely identify the position of the defect.

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Patent Metadata

Filing Date

March 15, 2000

Publication Date

November 20, 2001

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