Driving circuit for display device

1. A driving circuit for a display device in which each of a plurality of pixels includes a switching element for selectively supplying to a display element a pixel signal corresponding to display content, said pixel signal being received via a data line corresponding to said pixel, said pixel signal being selectively outputted to said data line from a data driver at a predetermined timing, said driving circuit comprising: a signal waveform correcting circuit for highlighting a rising edge and/or a falling edge of a waveform in the vicinity of a boundary between unit pixel periods of an input pixel signal so as to correct a waveform of an output pixel signal to be supplied from said data driver to each data line; said signal waveform correcting circuit including: a delay circuit for delaying said input pixel signal by a natural number m pixel periods; a difference calculating circuit for calculating a difference between said input pixel signal and a delay signal of said input pixel signal output from said delay circuit; a correction signal generator for generating a correction signal on the basis of an amplitude of a difference signal sent from said difference calculating circuit; and a signal split expansion circuit for generating, from said input pixel signal, m split pixel signals in an m-fold period of a pixel clock having pixel information every m pixel periods, for generating, from said correction signal, m split correction signals in an m-fold period of a pixel clock, and for outputting m corrected split pixel signals obtained by amplifying or attenuating a part of said split pixel signal by said split correction signal on the basis of said m split pixel signals and said m split correction signals corresponding thereto.

2. The driving circuit for a display device according to claim 1, wherein said correction signal generator includes: a correction regulating circuit for outputting correcting data on the basis of an amplitude of a difference signal sent from said difference calculating circuit; and an adder--subtracter for performing addition or subtraction of said correcting data and said input pixel signal to generate said correction signal, and wherein said signal split expansion circuit switches and selects said m split pixel signals and corresponding m split correction signals in a predetermined period by a selecting circuit, thereby generating m corrected split pixel signals.

3. The driving circuit for a display device according to claim 1, wherein said correction signal generator includes: a correction regulating circuit for outputting correcting data as said correction signal on the basis of an amplitude of a difference signal sent from said difference calculating circuit, and wherein said signal split expansion circuit has an adder--subtracter to add or subtract said corresponding m split correction signals to or from said m split pixel signals only for a predetermined period, thereby generating said corrected split signal.

4. A driving circuit for a display device in which each of a plurality of pixels includes a switching element for selectively supplying to a display element a pixel signal corresponding to display content, said pixel signal being received via a data line corresponding to said pixel, said pixel signal being selectively outputted to said data line from a data driver at a predetermined timing, said driving circuit comprising: a signal waveform correcting circuit for highlighting a rising edge and/or a falling edge of a waveform in the vicinity of a boundary between unit pixel periods of an input pixel signal so as to correct a waveform of an output pixel signal to be supplied from said data driver to each data line; said signal waveform correcting circuit including: a delay circuit for delaying said input pixel signal by a natural number m pixel periods; a difference calculating circuit for calculating a difference between said input pixel signal and a delay signal of said input pixel signal output from said delay circuit; a correction signal generator for generating a correction signal on the basis of an amplitude of a difference signal sent from said difference calculating circuit; and a signal split expansion circuit for generating, from said input pixel signal, m split pixel signals in an m-fold period of a pixel clock having pixel information every m pixel periods, for generating, from said correction signal, m split correction signals in an m-fold period of a pixel clock, and for outputting m corrected split pixel signals obtained by amplifying or attenuating a part of said split pixel signal by said split correction signal on the basis of said m split pixel signals and said m split correction signals corresponding thereto, wherein said signal split expansion circuit is constructed with m signal split circuits, and uses 1 to m sampling clocks having phases which are different from each other by a 1/m period and having m-fold period of a reference pixel clock of said input pixel, and said m signal split circuits forming m correction split pixel signals in phase which have different pixel information.

5. The driving circuit for a display device according to claim 4, wherein 1st to [m-1]th signal split circuits include respectively: a first latch circuit for latching said input pixel signal and said correction signal sent from said correction signal generator respectively on the basis of any of 1st to [m-1]th sampling clocks; a second latch circuit for latching respective output signals sent from said first latch circuit on the basis of an mth sampling clock; and a selecting circuit for selectively switching and outputting any of 1st to [m-1]th split pixel signals and any of corresponding 1st to [m-1]th split correction signals which are output from said second latch circuit on the basis of a predetermined selection clock, thereby generating corresponding 1st to [m-1]th corrected split pixel signals, and wherein an mth signal split circuit includes: a latch circuit for latching said input pixel signal and said correction signal sent from said correction signal generator on the basis of said mth sampling clock; a selecting circuit for selectively switching and outputting an mth split pixel signal and a corresponding mth split correction signal which are output from said latch circuit on the basis of a predetermined selection clock, thereby generating a corresponding mth corrected split pixel signal.

6. The driving circuit for a display device which sequentially drives a plurality of display pixels arranged in a matrix, said plurality of display pixels each including a display element and a switching element for selectively supplying to said display element a signal corresponding to display content, said driving circuit comprising: a signal waveform correcting circuit for correcting an input pixel signal for driving each display pixel, said signal being supplied to said display pixel via said switching element, wherein said signal waveform correcting circuit amplifies or attenuates an amplitude of an input pixel signal for a beginning predetermined period of a unit pixel period in which each display pixel is driven depending on a difference between said input pixel signal for a past unit pixel period and said input pixel signal for a current unit pixel period and a position of said display pixel on a display section corresponding to said current unit pixel period, and said signal waveform correcting circuit includes: a delay circuit for delaying said input pixel signal by a natural number m pixel periods; a difference calculating circuit for calculating a difference between said input pixel signal and a delay signal of said input pixel signal output from said delay circuit; a correction signal generator having a position information generator for generating position information of a corresponding display pixel and serving to generate a correction signal on the basis of said position information and a difference signal sent from said difference calculating circuit; and a signal split expansion circuit for generating, from said input pixel signal, m split pixel signals in an m-fold period of a pixel clock having pixel information every m pixel periods, for generating, from said correction signal, m split correction signals in an m-fold period of a pixel clock, and for generating corrected split pixel signals from said m split pixel signals and said m split correction signals corresponding thereto, wherein an amplitude of said split pixel signal for a beginning predetermined period of one unit pixel period of said m pixel periods is amplified or attenuated depending on a difference between said input pixel signal for a past unit pixel period and said input pixel signal for a current unit pixel period, and a position of said display pixel on a display section corresponding to said current unit pixel period.

7. The driving circuit for a display device according to claim 6, wherein said correction signal generator further includes: a correction regulating circuit for outputting correcting data corresponding to said position information and a difference signal sent from said difference calculating circuit; and an adder--subtracter for performing addition or subtraction of said correcting data and said input pixel signal to generate said correction signal, and wherein said signal split expansion circuit switches and selects said m split pixel signals and said corresponding m split correction signals in a predetermined period by a selecting circuit, thereby generating m corrected split pixel signals.

8. The driving circuit for a display device according to claim 6, wherein said correction signal generator includes: a correction regulating circuit for outputting correcting data as said correction signal on the basis of an amplitude of a difference signal sent from said difference calculating circuit, and said signal split circuit includes an adder--subtracter to add or subtract said corresponding m split correction signals to or from said m split pixel signals in a predetermined timing, thereby generating corrected split pixel signals.

9. A driving circuit for a display device which sequentially drives a plurality of display pixels arranged in a matrix, said plurality of display pixels each including a display element and a switching element for selectively supplying to said display element a signal corresponding to display content, said driving circuit comprising: a signal waveform correcting circuit for correcting an input pixel signal for driving each display pixel, said signal being supplied to said display pixel via said switching element, said signal waveform correcting circuit including: a delay circuit for delaying said input pixel signal by a natural number m pixel periods; a difference calculating circuit for calculating a difference between said input pixel signal and a delay signal of said input pixel signal output from said delay circuit; a correction signal generator having a position information generator for generating position information of a corresponding display pixel and serving to generate a correction signal on the basis of said position information and a difference signal sent from said difference calculating circuit; and a signal split expansion circuit for generating, from said input pixel signal, m split pixel signals in an m-fold period of a pixel clock having pixel information every m pixel periods, for generating, from said correction signal, m split correction signals in an m-fold period of a pixel clock, and for generating corrected split pixel signals from said m split pixel signals and said m split correction signals corresponding thereto, wherein an amplitude of said split pixel signal for a beginning predetermined period of one unit pixel period of said m pixel periods is amplified or attenuated depending on a difference between said input pixel signal for a past unit pixel period and said input pixel signal for a current unit pixel period, and a position of said display pixel on a display section corresponding to said current unit pixel period, and said beginning predetermined period of said unit pixel period, in which said amplitude of said split pixel signal is controlled, is one pixel period of said input pixel signal.

10. A driving circuit for a display device which sequentially drives a plurality of display pixels arranged in a matrix, said plurality of display pixels each including a display element and a switching element for selectively supplying to said display element a signal corresponding to display content, said driving circuit comprising: a signal waveform correcting circuit for correcting an input pixel signal for driving each display pixel, said signal being supplied to said display pixel via said switching element, wherein said signal waveform correcting circuit amplifies or attenuates an amplitude of an input pixel signal for a beginning predetermined period of a unit pixel period corresponding to each display pixel depending on a difference between an input pixel signal for a plurality of past unit pixel periods and an input pixel signal for a current unit pixel period, and influence of a difference between an input pixel signal for a closer past unit pixel period and said input pixel signal for said current unit pixel period on said corrected input pixel signal is set greater than influence of a difference between an input pixel signal for a farther past unit pixel period and said input pixel signal for said current unit pixel period on said corrected input pixel signal.

11. A driving circuit for a display device which sequentially drives a plurality of display pixels arranged in a matrix, said plurality of display pixels each including a display element and a switching element for selectively supplying to said display element a signal corresponding to display content, said driving circuit comprising: a signal waveform correcting circuit for correcting an input pixel signal for driving each display pixel, said signal being supplied to said display pixel via said switching element, wherein said signal waveform correcting circuit amplifies or attenuates an amplitude of an input pixel signal for a beginning predetermined period of a unit pixel period corresponding to each display pixel depending on a difference between an input pixel signal for a plurality of past unit pixel periods and an input pixel signal for a current unit pixel period, and said signal waveform correcting circuit includes: a delay circuit for delaying said input pixel signal by .alpha..multidot.m pixel periods, m being a natural number and a being an integer of 1 or more; a difference calculating circuit for calculating a difference between said input pixel signal and delay signals obtained by a delay of 1.multidot.m to .alpha..multidot.m pixel periods and output from said delay circuit, respectively; a correction signal generator for generating a correction signal on the basis of .alpha. difference signals sent from said difference calculating circuit; and a signal split expansion circuit for generating, from said input pixel signal, m split pixel signals having pixel information every m pixel periods, for generating, from said correction signal, m split correction signals, and for generating corrected split pixel signals from said m split pixel signals and said corresponding m split correction signals, wherein said m pixel periods act as a unit pixel period, and an amplitude of said split pixel signal for a beginning predetermined period of said unit pixel period is amplified or attenuated in response to said correction signal.

12. The driving circuit for a display device according to claim 11, wherein said correction signal generator changes a first difference signal which is a difference between said input pixel signal and a delay signal obtained by delaying said input pixel signal by 1.multidot.m pixel periods on the basis of other [.alpha.-1] difference signals which are differences between said input pixel signal and delay signals obtained by a delay of 2.multidot.m pixel periods or more, thereby creating correcting data and generating a correction signal on the basis of said correcting data.

13. The driving circuit for a display device according to claim 11, wherein said corrected split pixel signal generated by correcting said input pixel signal is generated by reflecting the newest first difference signal which is a difference between said input pixel signal and a delay signal obtained by delaying said input pixel signal by 1.multidot.m pixel periods more than other [.alpha.-1] difference signals.

14. The driving circuit for a display device according to claim 11, wherein said correction signal generator includes: a correction calculating circuit for changing an amplitude of a first difference signal which is a difference between said input pixel signal and a delay signal obtained by delaying said input pixel signal by 1.multidot.m pixel periods on the basis of said amplitude and other [.alpha.-1] difference signals which are differences between said input pixel signal and delay signals obtained by a delay of 2.multidot.m pixel periods or more, thereby generating correcting data; and an adder--subtracter for performing addition or subtraction of said correcting data and said input pixel signal to generate a correction signal, and wherein said signal split expansion circuit includes: an original pixel signal split circuit for generating, from said input pixel signal, m split pixel signals in an m-fold period of a pixel clock having pixel information every m pixel periods; a correction signal split circuit for generating, from said correction signal, m split correction signals in an m-fold period of a pixel clock; and a selecting circuit for selectively switching said m split pixel signals and said corresponding m split correction signals in a predetermined period to output a corrected split pixel signal.

15. The driving circuit for a display device according to claim 11, wherein said correction signal generator changes an amplitude of a first difference signal which is a difference between said input pixel signal and a delay signal obtained by delaying said input pixel signal by 1.multidot.m pixel periods on the basis of said amplitude and other [.alpha.-1] difference signals which are differences between said input pixel signal and delay signals obtained by a delay of 2.multidot.m pixel periods or more, thereby generating a correction signal, and wherein said signal split expansion circuit includes: an original pixel signal split circuit for generating, from said input pixel signal, m split pixel signals in an m-fold period of a pixel clock having pixel information every m pixel periods; a correction signal split circuit for generating, from said correction signal, m split correction signals in an m-fold period of a pixel clock; and an adder--subtracter for adding or subtracting said corresponding m split correction signals to or from said m split pixel signals in a predetermined period, thereby generating a corrected split pixel signal.

16. The driving circuit for a display device according to claim 11, wherein a beginning predetermined period of said unit pixel period in which said amplitude of said split pixel signal is controlled is one pixel period of said input pixel signal.

17. The driving circuit for a display device according to claim 11, wherein a sampling period for sending a display signal to each display pixel is set longer than one unit pixel period.