Patentable/Patents/US-6344692
US-6344692

Highly integrated and reliable DRAM adapted for self-aligned contact

PublishedFebruary 5, 2002
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

A semiconductor device and its manufacture method wherein the semiconductor substrate has first and second insulating films, the first insulating film being an insulating film other than a silicon nitride film formed at least on a side wall of a conductive pattern including at least one layer of metal or metal silicide, and the second insulating film being a silicon nitride film formed to cover the first insulating film and the upper surface and side wall of the conductive pattern. The first insulating film may be formed to cover the upper surface and side wall of the conductive pattern. A semiconductor device and its manufacture method are provided which can realize high integrated DRAMs of 256 M or larger without degrading reliability and stability.

Patent Claims
9 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A semiconductor device comprising: a plurality of first conductive layers disposed on a substrate generally in parallel; a first insulating film formed on said substrate, covering said first conductive layers; a second insulating film made of a silicon nitride film and formed on said first insulating film; a first contact area formed in and through said first and second insulating films between said plurality of first conductive layers; a second conductive layer formed in said first contact area; a third insulating film having etching characteristics different from a silicon nitride film and formed on said second insulating film; a second contact area formed in said third insulating film and at least partially disposed on said first contact area; a third conductive layer formed in said second contact area, and connected to said second conductive layer; and a fourth insulating film made of a silicon nitride film, formed on said third conductive layer, and constituting a thickness larger than that of said second insulating film, wherein said second contact area extends to an area over said second insulating film formed at the outside of said second conductive layer, and is stopped at a surface of said second insulating film.

2

2. A semiconductor device comprising: a semiconductor substrate having a surface; first and second conductive layers formed at levels different in distance from the substrate surface, the levels becoming higher in the order of the first and second conductive layers; a first insulating film formed on said substrate, covering said first and second conductive layers; a first contact area formed through said first insulating film and exposing the top surface of said first conductive layer; a second contact area formed through said first insulating film and said second conductive layer, said second conductive layer having a side wall exposed in said second contact area; and a pair of third conductive layers formed at least in said first and second contact areas and connected via said first contact area to the surface of said first conductive layer and to the side wall of said second conductive layer via said second contact area, wherein D 1 is larger than D 2 , where D 1 is a depth from the surface of said first insulating film to said first conductive layer and D 2 is a depth from the surface of said first insulating film to said second conductive layer.

3

3. A semiconductor device according to claim 2 , further comprising a second insulating film formed under said second conductive layer and having etching characteristics different from said first insulating film.

4

4. A semiconductor device according to claim 3 , wherein said second contact area is formed through said first insulating film, said second conductive layer, and said second insulating film.

5

5. A semiconductor device according to claim 3 , wherein said second insulating film is a silicon nitride film.

6

6. A semiconductor device according to claim 2 , wherein the surface of said first insulating film is planarized to be generally parallel to said substrate.

7

7. A semiconductor device comprising: a semiconductor substrate having a surface; first to third conductive layers formed at levels different in distance from the substrate surface, the levels becoming higher in the order of the first, third, and second conductive layers; a first insulating film formed on said substrate inclusive of said first to third conductive layers; a second insulating film formed under said second conductive layer and having etching characteristic different from said first insulating film; a third insulating film formed to cover said third conductive layer and having etching characteristics same as said second insulating film; a first contact area formed through said first insulating film and exposing the top surface of said first conductive layer; a second contact area formed through said first insulating film, said second conductive layer, and said second insulating film, said second conductive layer having a side wall exposed in said second contact area; a third contact area formed through said first and third insulating films and exposing the surface of said third conductive layer; and three fourth conductive layers respectively connected to the surface of said first conductive layer via said first contact area, to the side wall of said second conductive layer via said second contact area, and to the surface of said third conductive layer via said third contact area, wherein D 1 >D 3 >D 2 , where D 1 is a depth from the surface of said first insulating film to said first conductive layer, D 2 is a depth from the surface of said first insulating film to said second conductive layer, and D 3 is a depth from the surface of said first insulating film to said conductive layer.

8

8. A semiconductor device according to claim 7 , wherein said second and third insulating films are made of a silicon nitride film.

9

9. A semiconductor device according to claim 7 , wherein the surface of said first insulating film is planarized to be generally parallel to said substrate.

Classification Codes (CPC)

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Patent Metadata

Filing Date

June 16, 1997

Publication Date

February 5, 2002

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