Patentable/Patents/US-6412024
US-6412024

Sound board emulation using digital signal processor

PublishedJune 25, 2002
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

An improved audio-output device coupleable to a computer system, in which a DSP operating under software control emulates a common command interface. The command interface has a set of registers that are made available to the CPU for reading and writing, even if there are no such physical registers available in the device. The DSP also performs tasks in addition to audio-output, even though the audio-output device is required to respond immediately to commands from the CPU. The audio-output device has a DSP for interpreting and executing commands received from the CPU, a local memory for storing data input to or output from the DSP, a bus-interface (BIF) element for coupling the DSP and memory to a system bus, and a direct memory access (DMA) element for transferring data between the local memory and the system bus. The local memory has an emulation region for emulating a set of named registers the CPU may read from and write into according to the command interface, and a communication region for transmitting messages between the CPU and the DSP. The emulation region is indicated by a base register and a set of offset values, and has a dynamically allocated set of registers for emulating the set of named registers the CPU may read from and write into.

Patent Claims
25 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A method of emulating a sound board using an audio output device, the audio output device including a bus interface element for coupling to a system bus of a computer system, a digital signal processor, and a local memory, comprising the steps of: writing to a communication area of the local memory upon receipt of one of a first subset of a plurality of commands; and reading from the communication area of the local memory upon receipt of one of a second subset of the plurality of commands; wherein the writing and the reading are performed by the bus interface element, and wherein the bus interface element and the digital signal processor can access the local memory simultaneously.

2

2. A method according to claim 1 , further comprising the step of generating a designated sound sequence according to one of the plurality of commands.

3

3. A method according to claim 1 , wherein the communication area comprises a read communication area and a write communication area.

4

4. A method according to claim 1 , wherein the local memory comprises: a plurality of addressable registers; a base register comprising a value indicative of an address of one of the plurality of addressable registers; a zeroth read communication area located in the local memory at a zeroth offset from the address; a first read communication area located in the local memory at a first offset from the address; and a write communication area located in the local memory at a second offset from the address.

5

5. A method according to claim 1 , further comprising the step of transferring data between the local memory and a system memory of the computer system.

6

6. A method according to claim 5 , wherein the audio output device further includes a direct memory access transfer device, and wherein the direct memory access transfer device performs the step of transferring data between the local memory and the system memory of the computer system.

7

7. A method according to claim 1 , further comprising the step of receiving the one of the plurality of commands and sending to the computer system an indication of completion of the one of the plurality of commands.

8

8. A method according to claim 7 , wherein the step of receiving and the step of sending are performed using a communication word.

9

9. A method according to claim 8 , wherein the communication word includes a first part indicating one of a set of registers for the digital signal processor to emulate and a second part indicating data from a processor of the computer system.

10

10. A method according to claim 8 , wherein the communication words includes a first part having a first state indicating receipt of the one of the plurality of commands and a second part indicating completion of the one of the plurality of commands.

11

11. A method according to claim 8 , wherein the communication word includes a first part indicating a read command or a write command and a second part indicating one of a set of registers for the digital signal processor to emulate.

12

12. A method according to claim 7 , wherein the step of receiving is performed in a polling configuration.

13

13. A method according to claim 7 , wherein the step of receiving is performed using interrupts.

14

14. A method according to claim 1 , wherein the local memory includes a data memory and a program memory.

15

15. A method according to claim 1 , wherein the local memory of the audio output device is coupled directly to the system bus.

16

16. A method according to claim 1 , wherein the local memory of the audio output device is not coupled directly to the system bus.

17

17. An audio output device that emulates a sound board, comprising: a bus interface element for coupling to a system bus of a computer system; a digital signal processor for executing commands received from the bus interface element; and a local memory; wherein the bus interface element writes to a communication area of the local memory upon receipt of one of a first subset of a plurality of commands and reads from the communication area of the local memory upon receipt of one of a second subset of the plurality of commands, and wherein the bus interface element and the digital signal processor can access the local memory simultaneously.

18

18. An audio output device according to claim 17 , wherein the audio output device generates a designated sound sequence according to one of the plurality of commands.

19

19. An audio output device according to claim 17 , wherein the communication area comprises a read communication area and a write communication area.

20

20. An audio output device according to claim 17 , wherein the local memory comprises: a plurality of addressable registers; a base register comprising a value indicative of an address of one of the plurality of addressable registers; a zeroth read communication area located in the local memory at a zeroth offset from the address; a first read communication area located in the local memory at a first offset from the address; and a write communication area located in the local memory at a second offset from the address.

21

21. An audio output device according to claim 17 , wherein the bus interface element further transfers data between the local memory and a system memory of the computer system.

22

22. An audio output device according to claim 21 , further comprising a direct memory access transfer device, and wherein the direct memory access transfer device performs the step of transferring data between the local memory and the system memory of the computer system.

23

23. An audio output device according to claim 17 , wherein the local memory includes a data memory and a program memory.

24

24. An audio output device according to claim 17 , wherein the local memory of the audio output device is coupled directly to the system bus.

25

25. An audio output device according to claim 17 , wherein the local memory of the audio output device is not coupled directly to the system bus.

Classification Codes (CPC)

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Patent Metadata

Filing Date

September 27, 2000

Publication Date

June 25, 2002

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Cite as: Patentable. “Sound board emulation using digital signal processor” (US-6412024). https://patentable.app/patents/US-6412024

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