A method for producing a chip module includes punching a chip carrier to form a chip carrier fixing section and chip carrier contact sections spaced apart from the chip carrier fixing section by slots defining a given distance. The given distance is subsequently reduced to a dimension preventing a flow through of a sealing mass by a swaging operation carried out at least in a region close to the slots.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method for producing a chip module, which comprises: punching a metal chip carrier to form a chip carrier fixing section and chip carrier contact sections spaced apart from the chip carrier fixing section by slots defining a given distance; subsequently reducing the given distance between the chip carrier fixing section and the chip carrier contact sections to a given dimension by a swaging operation carried out at least in a region close to the slots; placing an electronic chip on the chip carrier fixing section; leading terminal wires of the chip to the chip carrier contact sections; and encapsulating the chip along with the terminal wires on the chip carrier with a sealing mass prevented from flowing through the slots by the given dimension.
2. The method according to claim 1 , which comprises reducing a material thickness of the chip carrier with the swaging operation to 30 to 70% of an original material thickness.
3. The method according to claim 1 , which comprises reducing a material thickness of the chip carrier with the swaging operation to 50% of an original material thickness.
4. The method according to claim 1 , which comprises the slots are constricted by the swaging operation to a width of 4-7 m.
5. The method according to claim 1 , which comprises the slots are constricted by the swaging operation to a width of 5 m.
6. A method for producing a chip module, which comprises: punching a metal chip carrier having first and second opposite sides to form a chip carrier fixing section and chip carrier contact sections spaced apart from the chip carrier fixing section by slots; subsequently forming a depression into a region adjacent the slots on the first side of the chip carrier by a swaging operation defining a receiving space; placing an electronic chip on the chip carrier fixing section on the second side of the chip carrier; leading terminal wires of the chip to the chip carrier contact sections; and encapsulating the chip along with the terminal wires on the chip carrier with a sealing mass passing through the slots into the receiving space.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
January 31, 2000
October 29, 2002
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