A computer having a backplane and a motherboard disposed on the backplane along with expansion slots for receiving expansion cards. The backplane further having circuitry coupled thereto for performing an alarm function where the alarm circuitry is not coupled to a card occupying one of the expansion slots, instead the alarm circuitry is coupled to the backplane in a manner so that it is not directly under the supervision of the system processor on the motherboard. The alarm circuitry including processors which use the LON bus protocols for receiving and transmitting information relating to environmental conditions in the PC.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A computer comprising: a protective case; a backplane disposed inside said protective case; a system microprocessor coupled to said backplane; a plurality of expansion slots, each coupled to the backplane and a first bus which is operated under the supervision of the system microprocessor, each of the expansion slots having a connector for receiving an expansion card; said backplane coupled to alarm circuitry for monitoring environmental conditions inside said case, said alarm circuitry including a bus transceiver processor for transmitting and receiving second bus signals over a second bus without direct supervision of the system microprocessor; said second bus including a two wire local operating network connection which is polarity insensitive; and wherein said second bus signals are organized in a predetermined fashion which include data structures for accomplishing end-to-end acknowledgment and data structure for detecting collisions of data packets transmitted over said second bus.
2. A computer comprising: a protective case; a backplane disposed inside said protective case; a system microprocessor coupled to said backplane; a plurality of expansion slots, each coupled to the backplane and a first bus which is operated under the supervision of the system microprocessor, each of the expansion slots having a connector for receiving an expansion card; said backplane coupled to alarm circuitry for monitoring environmental conditions inside said case, said alarm circuitry including a bus transceiver processor for transmitting and receiving second bus signals over a second bus without direct supervision of the system microprocessor; said second bus including a two wire local operating network connection which is polarity insensitive; wherein said system processor is disposed on a motherboard and thereby indirectly coupled to said backplane; and wherein said second bus signals are organized in a predetermined fashion which include data structures for accomplishing end-to-end acknowledgment and data structure for detecting collisions of data packets transmitted over said second bus.
3. A computer of claim 2 wherein said second bus signals include data structures therein for providing network management services for installation and configuration of nodes on said second bus and for downloading of software over said second bus for use in connection with said alarm circuitry.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
July 19, 2001
October 29, 2002
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