A double blanket ion implant method for forming diffusion regions in memory array devices, such as a MOSFET access device is disclosed. The method provides a semiconductor substrate with a gate structure formed on its surface Next, a first pair of diffusion regions are formed in a region adjacent to the channel region by a first blanket ion implantation process. The first blanket ion implantation process has a first energy level and dose. The device is subjected to oxidizing conditions, which form oxidized sidewalls on the gate structure. A second blanket ion implantation process is conducted at the same location as the first ion implantation process adding additional dopant to the diffusion regions. The second blanket ion implantation process has a second energy level and dose. The resultant diffusion regions provide the device with improved static refresh performance over prior art devices. In addition, the first and second energy levels and doses are substantially lower than an energy level and dose used in a prior art single implantation process.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method of forming a device to be used in a memory array, the device comprising a gate structure provided on a surface of a semiconductor substrate, said method comprising the steps of: forming a first doping implant within the substrate to form first and second diffusion regions underneath the surface of the substrate on opposite sides of the gate structure; diffusing a portion of said first doping implant underneath a portion of said gate structure, thereby forming first and second overlap regions corresponding to said first and second diffusion regions; and forming a second doping implant within the substrate at locations of the first and second diffusion regions to add additional dopant to the first and second diffusion regions, wherein each diffusion region comprises a first portion having a first dopant concentration and a second portion having a second dopant concentration.
2. The method of claim 1 wherein the dopant is selected from the group consisting of phosphorous, arsenic and antimony.
3. The method of claim 2 wherein the dopant is phosphorous.
4. The method of claim 1 wherein said first doping implant step is performed at a first energy level and first dose and said second doping implant is performed at a second energy level and second dose.
5. The method of claim 4 wherein the first energy level is different from the second energy level.
6. The method of claim 4 wherein the first dose is different from the second dose.
7. The method of claim 4 wherein the first energy level is less than 30 Kev and the first dose is less than 7 10 12 ions/cm 2 .
8. The method of claim 4 wherein the first energy level is within a range of 5 Kev to 45 Kev and the first dose is within a range of 1 10 12 ions/cm 2 to less than 7 10 12 ions/cm 2 .
9. The method of claim 4 wherein the first energy level is approximately 15 Kev and the first dose is approximately 2 10 12 ions/cm 2 .
10. The method of claim 4 wherein the second energy level is less than 30 Kev and the second dose is less than 1 10 13 ions/cm 2 .
11. The method of claim 4 wherein the second energy level is within a range of 5 Kev to 60 Kev and the second dose is within a range of 1 10 12 ions/cm 2 to 1 10 13 ions/cm 2 .
12. The method of claim 4 wherein the second energy level is approximately 20 Kev and the second dose is approximately 4 10 12 ions/cm 2 .
13. The method of claim 1 wherein the first dopant concentration is different from the second dopant concentration.
14. The method of claim 1 , wherein said first and second doping implants are performed by blanket ion implanting process.
15. The method of claim 14 , wherein sidewalls of the gate structure are oxidized prior to said second doping implant.
16. The method of claim 15 , wherein the sidewalls of the gate structure are oxidized by a thermal re-ox process.
17. A method of forming a metal oxide semiconductor field effect transistor comprising the steps of: providing a gate structure on a surface of a semiconductor substrate; implanting a dopant within the substrate to form first and second diffusion regions underneath the surface of said substrate; diffusing a portion of said dopant to form first and second overlap regions underneath a portion of said gate structure corresponding to said first and second diffusion regions; oxidizing sidewalls of the gate structure; and implanting the dopant within the substrate at locations of the first and second diffusion regions to add additional dopant to the first and second diffusion regions, wherein each diffusion region comprises a first portion having a first dopant concentration and a second portion having a second dopant concentration.
18. A method of forming a device on a substrate, the device comprising a gate structure provided on a surface of the substrate, said method comprising the steps of: implanting a dopant at a first energy level and first does into the substrate to form first and second diffusion regions underneath the surface of the substrate on opposite sides of the gate structure; diffusing a portion of said dopant to form first and second overlap regions underneath a portion of said gate structure corresponding to said first and second diffusion regions; and implanting the dopant at a second energy level and second dose into the substrate at locations of the first and second diffusion regions to add additional dopant to the first and second diffusion regions, wherein each diffusion region comprises a first portion having a first dopant concentration and a second portion having a second dopant concentration.
19. The method of claim 18 wherein the dopant is selected from the group consisting of phosphorous, arsenic and antimony.
20. The method of claim 19 wherein the dopant is phosphorous.
21. The method of claim 18 wherein the first energy level is different from the second energy level.
22. The method of claim 18 wherein the first dose is different from the second dose.
23. The method of claim 18 wherein the first energy level is less than 30 Kev and the first dose is less than 7 10 12 ions/cm 2 .
24. The method of claim 18 wherein the first energy level is within a range of 5 Kev to 45 Kev and the first dose is within a range of 1 10 12 ions/cm 2 to less than 7 10 12 ions/cm 2 .
25. The method of claim 18 wherein the first energy level is approximately 15 Kev and the first dose is approximately 2 10 12 ions/cm 2 .
26. The method of claim 18 wherein the second energy level is less than 30 Kev and the second dose is less than 1 10 13 ions/cm 2 .
27. The method of claim 18 wherein the second energy level is within a range of 5 Kev to 60 Kev and the second dose is within a range of 1 10 12 ions/cm 2 to 1 10 13 ions/cm 2 .
28. The method of claim 18 wherein the second energy level is approximately 20 Kev and the second dose is approximately 4 10 12 ions/cm 2 .
29. The method of claim 18 wherein the first dopant concentration is different from the second dopant concentration.
30. The method of claim 18 , wherein said implanting steps are performed by a blanket ion implanting process.
31. The method of claim 30 , wherein sidewalls of the gate structure are oxidized prior to said second implanting step.
32. The method of claim 31 , wherein the sidewalls of the gate structure are oxidized by a thermal re-ox process.
33. A method of forming a memory array device on a substrate, the device comprising a gate structure provided on a surface of the substrate, said method comprising the steps of: blanket ion implanting a dopant at a first energy level and first dose into the substrate to form first and second diffusion regions underneath the surface of the substrate on opposite sides of the gate structure; diffusing a portion of said dopant to form first and second overlap regions underneath a portion of said gate structure corresponding to said first and second diffusion regions; oxidizing sidewalls of the gate structure; and blanket ion implanting the dopant at a second energy level and second dose into the substrate at locations of the first and second diffusion regions to add additional dopant to the first and second diffusion regions, wherein each diffusion region comprises a first portion having a first dopant concentration and a second portion having a second dopant concentration.
34. The method of claim 33 , wherein said oxidizing step is a thermal re-ox process.
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March 21, 2000
November 19, 2002
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