A substrate having at least one fuse in a fuse layer. An upper etch-stop layer over the fuse, a lower etch-stop layer having a different etch-chemistry over the fuse and, optionally, a diffusion barrier layer immediately over the fuse. The lower etch-stop later and the optional diffusion barrier providing a uniform passivation thickness for use in conjunction with laser fuse deletion processes. An upper etch-resistant layer over the lower etch-resistant layer and having an etch chemistry selective to that of the lower etch-resistant layer. Methods for providing a uniform passivation thickness over all the fuses, and for deleting such fuses.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method of forming a fuse structure, comprising: providing a fuse layer having a fuse formed therein; depositing a lower etch-resistant layer on an upper surface of the fuse layer and on an upper surface of the fuse; depositing an upper etch-resistant layer over the lower etch-resistant layer; and depositing an insulative layer containing a wiring line over the upper etch-resistant layer.
2. The method of claim 1 , wherein the upper etch-resistant layer includes material selected from the group consisting of silicon carbide, boron nitride, SiCN and silicon nitride.
3. The method of claim 2 , wherein the lower etch-resistant layer comprises silicon oxide.
4. A method of performing a fuse deletion, comprising: providing a metal fuse formed in a lower metal wiring layer, a lower etch-resistant layer formed on the fuse, providing an upper etch-resistant layer formed on and adjacent to the lower etch resistant layer and providing at least one upper insulative layer containing a wiring line formed on the upper etch-resistant layer; removing a portion of the at least one insulative layer above the fuse to the upper etch-resistant layer; removing a portion of the upper etch-resistant layer above the fuse to the lower etch-resistant layer; and applying radiant energy to the fuse until the fuse is deleted.
5. The method of claim 4 , wherein removing a portion of the at least one insulative layer further comprises etching the insulative layer.
6. The method of claim 5 , wherein the upper etch-resistant layer includes material selected from the group consisting of silicon carbide, boron nitride, SiCN and silicon nitride.
7. The method of claim 6 , wherein the lower etch resistant layer comprises silicon oxide.
8. The method of claim 4 , wherein the thickness between the top of the lower etch-resistant layer and the top of the fuse is approximately 10-100 nm.
9. The method of claim 4 , wherein applying radiant energy comprises emitting a laser beam into the fuse.
10. The method of claim 5 , further including forming a diffusion barrier layer between the lower etch-resistant layer and the fuse.
11. The method of claim 5 , wherein removing the portion of the upper etch-resistant layer above the fuse to the lower etch-resistant layer provides a uniform passivation thickness over the fuse.
12. The method of claim 11 , wherein the uniform passivation thickness over the fuse is approximately 50 to approximately 100 nanometers.
13. The method of claim 1 , further including forming a diffusion barrier layer between the lower etch-resistant layer and the surface of the fuse layer and the surface of the fuse.
14. The method of claim 13 , wherein the diffusion barrier layer includes material selected from the group consisting of silicon carbide, boron nitride, SiCN and silicon nitride.
15. The method of claim 10 , wherein the diffusion barrier layer includes material selected from the group consisting of silicon carbide, boron nitride, SiCN and silicon nitride.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
March 23, 2001
February 11, 2003
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