The present invention concerns the field of microstructures and in particular microstructures made via CMOS technology on semiconductor substrates intended to undergo micro-machining by wet chemical etching, in particular by a KOH etchant.According to the present invention, protection against the KOH reactive agent is provided to such a structure by the deposition of a metal film (40, 41, 43) including at least on external gold layer (43) on the surface of the structure.This metal film (40, 41, 43) advantageously allows the use of mechanical protective equipment to be omitted and thus allows the wafers to be processed in batches. The present invention also proves perfectly compatible with a standard gold bumping process.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A structure formed on a substrate having a first face or front face and a second face or back face, this substrate being formed of a semiconductor base material capable of being etched by the KOH reactive agent, this structure including at least one zone arranged on said front face formed of a material capable of being etched by said reactive agent, the substrate including at least one cavity etched by said KOH reactive agent in said back face of the substrate, wherein said structure includes a metal film formed on the entire surface of said front face, this metal film including at least one external gold layer resistant to said reactive agent and forming a protective layer against etching of said at least one zone by said KOH reactive agent during etching of said cavity.
2. The structure according to claim 1 , wherein said at least one gold layer is arranged on an intermediate metal layer acting as a diffusion barrier and adhesion promoter.
3. The structure according to claim 2 , wherein said intermediate metal layer is formed of TiW, TiN or TiW:N.
4. The structure according to claim 1 , wherein said at least one gold layer is a sputtered gold layer.
5. The structure according to claim 1 , wherein said at least one gold layer is formed of a first sputtered gold layer and a second gold layer electro-deposited on said first gold layer.
6. The structure according to claim 1 , wherein said at least one gold layer acts as a plating base for the electro-deposition of electric bumps.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
October 16, 2000
March 25, 2003
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