A method of manufacturing a semiconductor chip assembly includes providing a semiconductor chip and a conductive metal, wherein the chip includes a conductive pad and the conductive metal includes routing line that is disposed above and overlaps the pad, etching the conductive metal on a side opposite the routing line to expose the routing line, and forming a connection joint that contacts and electrically connects the routing line and the pad.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method of manufacturing a semiconductor chip assembly, comprising: providing a semiconductor chip and a conductive metal, wherein the chip includes a conductive pad, the conductive metal is a single metallic material that includes a routing line, and the routing line is disposed above and overlaps the pad; then etching the conductive metal on a side opposite the routing line, thereby exposing the routing line; and then forming a connection joint that contacts and electrically connects the routing line and the pad.
2. The method of claim 1 , including mechanically attaching the chip to the conductive metal using an insulative adhesive before etching the conductive metal.
3. The method of claim 2 , including etching the adhesive thereby exposing the pad after etching the conductive metal and before forming the connection joint.
4. The method of claim 3 , wherein the adhesive contacts and is sandwiched between the conductive metal and the pad, and the conductive metal and the pad are electrically isolated from one another after etching the adhesive and before forming the connection joint.
5. The method of claim 1 , including etching the conductive metal to form the routing line before etching the conductive metal on the opposite side.
6. The method of claim 1 , including etching the conductive metal on the opposite side to form a pillar that is connected to and extends above the routing line and does not overlap the pad.
7. The method of claim 6 , including forming the connection joint before forming the pillar.
8. The method of claim 6 , including forming the connection joint after forming the pillar.
9. The method of claim 1 , wherein the conductive metal is a continuous strip of copper.
10. The method of claim 1 , wherein the chip includes a plurality of conductive pads, the conductive metal includes a plurality of routing lines, the routing lines are disposed above and overlap the pads, the routing lines are covered by the conductive metal before etching the conductive metal, and the routing lines are exposed by etching the conductive metal.
11. A method of manufacturing a semiconductor chip assembly, comprising: providing a semiconductor chip that includes a conductive pad; providing a conductive metal that includes a routing line and a base, wherein the base is disposed above and covers and is wider than and is integral with and is the same metallic material as the routing line, and the routing line includes outer edges that are covered by the base and extend between a bottom surface of the base and a bottom surface of the routing line; then disposing an adhesive between the chip and the conductive metal, thereby mechanically attaching the chip to the conductive metal such that the routing line is disposed above and overlaps the pad; then etching partially but not completely through the conductive metal on a side opposite the routing line, thereby removing a portion of the conductive metal directly above the routing line and forming a recessed portion in the conductive metal that provides a top surface for the routing line and is contiguous with the outer edges of the routing line; then etching the adhesive, thereby exposing the pad while the routing line is disposed above and overlaps the pad; and then forming a connection joint that contacts and electrically connects the routing line and the pad.
12. The method of claim 11 , wherein etching the adhesive includes applying a laser to the adhesive.
13. The method of claim 11 , wherein the routing line overlaps only one peripheral edge of the pad.
14. The method of claim 11 wherein the routing line overlaps only two peripheral edges of the pad, and the two peripheral edges are opposite one another.
15. The method of claim 11 , wherein the connection joint contacts a surface of the routing line that is disposed above and overlaps and faces away from the pad.
16. The method of claim 11 , wherein the connection joint is the only electrical conductor external to the chip that contacts the pad.
17. The method of claim 11 , wherein the connection joint and the adhesive are the only materials external to the chip that contact the pad.
18. The method of claim 11 , wherein the connection joint and the adhesive are the only materials that contact both the conductive trace and the pad.
19. The method of claim 11 , including encapsulating the chip after mechanically attaching the chip to the conductive metal and before etching the conductive metal.
20. The method of claim 11 , including etching the conductive metal on the opposite side to form a pillar that is connected to and extends above the routing line and does not overlap the pad, and forming an insulative base over the routing line and a lower portion of the pillar but not over an upper portion of the pillar.
21. The method of claim 20 , including forming the recessed portion and the pillar simultaneously.
22. The method of claim 20 , including forming the recessed portion before forming the pillar.
23. The method of claim 20 , including forming the connection joint before forming the pillar.
24. The method of claim 20 , including forming the connection joint after forming the pillar.
25. The method of claim 20 , wherein the pillar has a flat top surface and a diameter that is narrowest at the top surface.
26. The method of claim 20 , wherein the pillar extends a first distance above the recessed portion, the insulative base extends a second distance above the recessed portion, and the first distance is at least twice the second distance.
27. The method of claim 20 , wherein the pillar extends at least 100 microns above the insulative base.
28. The method of claim 20 , wherein the conductive metal is copper and the insulative base is epoxy.
29. The method of claim 11 , wherein the assembly is devoid of wire bonds, TAB leads and solder joints.
30. The method of claim 11 , wherein the chip includes a plurality of conductive pads, the conductive metal includes a plurality of routing lines, the base is disposed above and covers and is wider than and is integral with and is the same metallic material as the routing lines, the routing lines are disposed above and overlap the pads, the routing lines are covered by the base before etching the conductive metal, and the routing lines are exposed by etching the conductive metal.
31. A method of manufacturing a semiconductor chip assembly, comprising the following steps in the sequence set forth: disposing an insulative adhesive between a chip and a conductive metal, thereby mechanically attaching the chip to the conductive metal, wherein the chip includes upper and lower surfaces, the upper surface includes a pad, the conductive metal is a single metallic material that includes top, middle and bottom surfaces, the top surface faces in an opposite direction to the middle and bottom surfaces, the routing line is a protrusion that is integral with the middle surface and extends beneath the middle surface to the bottom surface, the routing line is disposed above and overlaps the pad, the upper and middle surfaces face one another, the upper and bottom surfaces face one another, and the adhesive contacts the upper and bottom surfaces; applying an etch to a portion of the top surface, thereby etching partially but not completely through a thickness of the conductive metal and removing a portion of the conductive metal directly above the routing line and forming a top surface of the routing line proximate to the middle surface; applying an etch to the adhesive, thereby exposing the pad; forming a connection joint that contacts and electrically connects the routing line and the pad; and forming an insulative base over the routing line.
32. The method of claim 31 , including applying an etch that forms a pillar in the opposite side of the conductive metal that extends to the top surface and is connected to and extends above the routing line and does not overlap the pad.
33. The method of claim 32 , including forming the pillar before forming the connection joint.
34. The method of claim 32 , including forming the pillar after forming the connection joint.
35. The method of claim 32 , including forming the pillar before forming the insulative base, wherein forming the insulative base includes simultaneously disposing the insulative base over the routing line and a lower portion of the pillar without disposing the insulative base over an upper portion of the pillar.
36. The method of claim 32 , including forming the pillar after partially forming the insulative base, wherein forming the insulative base includes disposing a first portion of the insulative base over the routing line after forming the connection joint and before forming the pillar, and then disposing a second portion of the insulative base over the first portion of the insulative base and a lower portion of the pillar without disposing the second portion of the insulative base over an upper portion of the pillar.
37. The method of claim 31 , including applying an etch to a portion of the bottom surface, thereby etching partially but not completely through a thickness of the conductive metal to form outer edges of the routing line that extend between the middle and bottom surfaces.
38. The method of claim 31 , including encapsulating the chip using an encapsulant that contacts the lower surface of the chip after mechanically attaching the chip to the conductive metal and before applying the etch to the portion of the top surface.
39. The method of claim 31 , wherein the assembly is devoid of wire bonds, TAB leads and solder joints.
40. The method of claim 31 , wherein the chip includes a plurality of conductive pads, the conductive metal includes a plurality of routing lines, the routing lines are disposed above and overlap the pads, the routing lines are covered from above by the conductive metal before etching the conductive metal, and the routing lines are exposed by etching the conductive metal.
41. A method of manufacturing a semiconductor chip assembly, comprising: providing a conductive metal layer with top and bottom surfaces, wherein the conductive metal layer is a single metallic material; providing a bottom etch mask under the bottom surface, wherein the bottom etch mask includes an opening that exposes a portion of the bottom surface; applying an etch to the exposed portion of the bottom surface through the opening in the bottom etch mask, thereby etching partially but not completely through the conductive metal layer to form outer edges of a routing line that extends to the bottom surface; mechanically attaching a chip to the conductive metal layer using an insulative adhesive, wherein the chip includes upper and lower surfaces, the upper surface includes a pad, the routing line is disposed above and overlaps the pad, the upper and bottom surfaces face one another, and the adhesive contacts the upper and bottom surfaces; providing a top etch mask over the top surface, wherein the top etch mask includes an opening that exposes a portion of the top surface; then applying an etch to the exposed portion of the top surface through the opening in the top etch mask, thereby etching partially but not completely through the conductive metal layer and removing a portion of the conductive metal layer above the routing line and the pad to (i) form a top surface of the routing line contiguous with the outer edges of the routing line and (ii) expose the adhesive above the pad and outside the routing line; applying an etch to the adhesive, thereby exposing the pad; and forming a connection joint that contacts and electrically connects the routing line and the pad.
42. The method of claim 41 , wherein applying the etch to the exposed portion of the bottom surface removes a first thickness of the conductive metal layer, applying the etch to the exposed portion of the top surface removes a second thickness of the conductive metal layer, and the second thickness is at least twice the first thickness.
43. The method of claim 41 , wherein applying the etch to the adhesive includes applying a laser that ablates the adhesive.
44. The method of claim 41 , wherein the routing line overlaps only one peripheral edge of the pad.
45. The method of claim 41 wherein the routing line overlaps only two peripheral edges of the pad, and the two peripheral edges are opposite one another.
46. The method of claim 41 , wherein the connection joint contacts a surface of the routing line that is disposed above and overlaps and faces away from the pad.
47. The method of claim 41 , wherein the connection joint is the only electrical conductor external to the chip that contacts the pad.
48. The method of claim 41 , wherein the connection joint and the adhesive are the only materials external to the chip that contact the pad.
49. The method of claim 41 , wherein the connection joint and the adhesive are the only materials that contact both the conductive trace and the pad.
50. The method of claim 41 , wherein the steps are performed in the sequence set forth.
51. A method of manufacturing a semiconductor chip assembly, comprising: providing a conductive metal layer with top and bottom surfaces, wherein the conductive metal layer is a single metallic material; providing a bottom etch mask under the bottom surface, wherein the bottom etch mask includes an opening that exposes a portion of the bottom surface; applying an etch to the exposed portion of the bottom surface through the opening in the bottom etch mask, thereby etching partially but not completely through the conductive metal layer to form outer edges of a routing line; mechanically attaching a chip to the conductive metal layer using an insulative adhesive, wherein the chip includes upper and lower surfaces, the upper surface includes a pad, the routing line is disposed above and overlaps the pad, the upper and bottom surfaces face one another, and the adhesive contacts the upper and bottom surfaces; providing a top etch mask over the top surface, wherein the top etch mask includes an opening that exposes a portion of the top surface; then applying an etch to the exposed portion of the top surface through the opening in the top etch mask, thereby etching partially but not completely through the conductive metal layer and removing a portion of the conductive metal layer above the routing line and the pad to (i) form a top surface of the routing line that is contiguous with the outer edges of the routing line, (ii) expose the adhesive above the pad and outside the routing line and (iii) form a pillar that is connected to the routing line and extends above the routing line and does not overlap the pad; applying an etch to the adhesive, thereby exposing the pad; and forming a connection joint that contacts and electrically connects the routing line and the pad.
52. The method of claim 51 , wherein applying the etch to the exposed portion of the bottom surface removes a first thickness of the conductive metal layer, applying the etch to the exposed portion of the top surface removes a second thickness of the conductive metal layer, and the second thickness is at least twice the first thickness.
53. The method of claim 51 , wherein applying the etch to the adhesive includes applying a laser that ablates the adhesive.
54. The method of claim 51 , wherein the routing line overlaps only one peripheral edge of the pad.
55. The method of claim 51 wherein the routing line overlaps only two peripheral edges of the pad, and the two peripheral edges are opposite one another.
56. The method of claim 51 , wherein the connection joint contacts a surface of the routing line that is disposed above and overlaps and faces away from the pad.
57. The method of claim 51 , wherein the connection joint is the only electrical conductor external to the chip that contacts the pad.
58. The method of claim 51 , wherein the connection joint and the adhesive are the only materials external to the chip that contact the pad.
59. The method of claim 51 , wherein the connection joint and the adhesive are the only materials that contact both the conductive trace and the pad.
60. The method of claim 51 , wherein the steps are performed in the sequence set forth.
61. A method of manufacturing a semiconductor chip assembly, comprising: providing a conductive metal layer with top and bottom surfaces, wherein the conductive metal layer is a single metallic material; providing a bottom etch mask under the bottom surface, wherein the bottom etch mask includes an opening that exposes a portion of the bottom surface; applying an etch to the exposed portion of the bottom surface through the opening in the bottom etch mask, thereby etching partially but not completely through the conductive metal layer to form outer edges of a routing line; mechanically attaching a chip to the conductive metal layer using an insulative adhesive, wherein the chip includes upper and lower surfaces, the routing line is disposed above and overlaps the pad, the upper and bottom surfaces face one another, and the adhesive contacts the upper and bottom surfaces; providing a first top etch mask over the top surface, wherein the first top etch mask includes an opening that exposes a first portion of the top surface; then applying an etch to the exposed first portion of the top surface through the opening in the first top etch mask, thereby etching partially but not completely through the conductive metal layer and removing a portion of the conductive metal layer above the routing line and the pad to (i) form a first portion of a top surface of the routing line that is contiguous with the outer edges of the routing line and (ii) expose the adhesive above the pad and outside the routing line; applying an etch to the adhesive, thereby exposing the pad; forming a connection joint in the opening in the adhesive that contacts and electrically connects the routing line and the pad; forming a first portion of an insulative base over the first portion of the top surface of the routing line; providing a second top etch mask over the top surface of the conductive metal layer, wherein the second top etch mask includes an opening that exposes a second portion of the top surface of the conductive metal layer; applying an etch to the exposed second portion of the top surface of the conductive metal layer through the opening in the second top etch mask, thereby etching partially but not completely through the conductive metal layer and removing a portion of the conductive metal layer above the routing line to (i) form a pillar that is connected to the routing line and extends above the routing line and does not overlap the pad and (ii) form a second portion of a top surface of the routing line that extends between the pillar and the first portion of the top surface of the routing line and is contiguous with the outer edges of the routing line; and forming a second portion of the insulative base over the first portion of the insulative base and the second portion of the top surface of the routing line and a lower portion of the pillar and not over an upper portion of the pillar.
62. The method of claim 61 , wherein applying the etch to the exposed portion of the bottom surface removes a first thickness of the conductive metal layer, applying the etch to the exposed portion of the top surface removes a second thickness of the conductive metal layer, and the second thickness is at least twice the first thickness.
63. The method of claim 61 , wherein applying the etch to the adhesive includes applying a laser that ablates the adhesive.
64. The method of claim 61 , wherein the routing line overlaps only one peripheral edge of the pad.
65. The method of claim 61 wherein the routing line overlaps only two peripheral edges of the pad, and the two peripheral edges are opposite one another.
66. The method of claim 61 , wherein the connection joint contacts a surface of the routing line that is disposed above and overlaps and faces away from the pad.
67. The method of claim 61 , wherein the connection joint is the only electrical conductor external to the chip that contacts the pad.
68. The method of claim 61 , wherein the connection joint and the adhesive are the only materials external to the chip that contact the pad.
69. The method of claim 61 , wherein the connection joint and the adhesive are the only materials that contact both the conductive trace and the pad.
70. The method of claim 61 , wherein the steps are performed in the sequence set forth.
71. A method of manufacturing a semiconductor chip assembly, comprising: providing a semiconductor chip, a conductive metal and an adhesive, wherein the chip includes a conductive pad, the conductive metal is a single metallic material that includes a routing line, the routing line is disposed above and overlaps the pad, and the adhesive contacts and is sandwiched between the routing line and the pad; then etching the conductive metal on a side opposite the routing line, thereby exposing the routing line; etching the adhesive, thereby exposing the chip; and electrically connecting the routing line and the pad.
72. The method of claim 71 , wherein etching the conductive metal removes a portion of the conductive metal that is above the routing line and overlaps the pad.
73. The method of claim 72 , wherein etching the conductive metal exposes a portion of the adhesive that is outside the routing line and overlaps the pad.
74. The method of claim 73 , wherein the conductive metal and the pad are electrically isolated from one another after etching the conductive metal and etching the adhesive and before electrically connecting the routing line and the pad.
75. The method of claim 71 , including etching the conductive metal to form the routing line before etching the conductive metal on the opposite side.
76. The method of claim 71 , including etching the conductive metal on the opposite side to form a pillar that is connected to and extends above the routing line and does not overlap the pad.
77. The method of claim 76 , including electrically connecting the routing line and the pad before forming the pillar.
78. The method of claim 76 , including electrically connecting the routing line and the pad after forming the pillar.
79. The method of claim 71 , wherein the conductive metal is a continuous strip of copper.
80. The method of claim 71 , wherein the chip includes a plurality of conductive pads, the conductive metal includes a plurality of routing lines, the routing lines are disposed above and overlap the pads, the routing lines are covered by the conductive metal before etching the conductive metal, and the routing lines are exposed by etching the conductive metal.
81. A method of manufacturing a semiconductor chip assembly, comprising: providing a semiconductor chip that includes a conductive pad; providing a conductive metal that includes a routing line and a base, wherein the base is disposed above and covers and is wider than and is integral with and is the same metallic material as the routing line, and the routing line includes outer edges that are covered by the base and extend between a bottom surface of the base and a bottom surface of the routing line; then disposing an adhesive between the chip and the conductive metal, thereby mechanically attaching the chip to the conductive metal such that the routing line is disposed above and overlaps the pad and the adhesive contacts and is sandwiched between the routing line and the pad; etching partially but not completely through the conductive metal on a side opposite the routing line, thereby removing a portion of the conductive metal directly above the routing line and forming a recessed portion in the conductive metal that provides a top surface for the routing line and is contiguous with the outer edges of the routing line while the routing line is disposed above and overlaps the pad and the adhesive contacts and is sandwiched between the routing line and the pad; etching the adhesive, thereby exposing the chip while the routing line is disposed above and overlaps the pad and the adhesive contacts and is sandwiched between the routing line and the pad; and electrically connecting the routing line and the pad.
82. The method of claim 81 , wherein etching the adhesive includes applying a laser to the adhesive.
83. The method of claim 81 , wherein the routing line overlaps only one peripheral edge of the pad.
84. The method of claim 81 wherein the routing line overlaps only two peripheral edges of the pad, and the two peripheral edges are opposite one another.
85. The method of claim 81 , wherein electrically connecting the routing line and the pad includes forming a connection joint that contacts a surface of the routing line that is disposed above and overlaps and faces away from the pad.
86. The method of claim 85 , wherein the connection joint is the only electrical conductor external to the chip that contacts the pad.
87. The method of claim 85 , wherein the connection joint and the adhesive are the only materials external to the chip that contact the pad.
88. The method of claim 85 , wherein the connection joint and the adhesive are the only materials that contact both the conductive trace and the pad.
89. The method of claim 81 , including encapsulating the chip after mechanically attaching the chip to the conductive metal and before etching the conductive metal.
90. The method of claim 81 , including etching the conductive metal on the opposite side to form a pillar that is connected to and extends above the routing line and does not overlap the pad, and forming an insulative base over the routing line and a lower portion of the pillar but not over an upper portion of the pillar.
91. The method of claim 90 , including forming the recessed portion and the pillar simultaneously.
92. The method of claim 90 , including forming the recessed portion before forming the pillar.
93. The method of claim 90 , including electrically connecting the routing line and the pad before forming the pillar.
94. The method of claim 90 , including electrically connecting the routing line and the pad after forming the pillar.
95. The method of claim 90 , wherein the pillar has a flat top surface and a diameter that is narrowest at the top surface.
96. The method of claim 90 , wherein the pillar extends a first distance above the recessed portion, the insulative base extends a second distance above the recessed portion, and the first distance is at least twice the second distance.
97. The method of claim 90 , wherein the pillar extends at least 100 microns above the insulative base.
98. The method of claim 90 , wherein the conductive metal is copper and the insulative base is epoxy.
99. The method of claim 81 , wherein the assembly is devoid of wire bonds, TAB leads and solder joints.
100. The method of claim 81 , wherein the chip includes a plurality of conductive pads, the conductive metal includes a plurality of routing lines, the base is disposed above and covers and is wider than and is integral with and is the same metallic material as the routing lines, the routing lines are disposed above and overlap the pads, the routing lines are covered by the base before etching the conductive metal, and the routing lines are exposed by etching the conductive metal.
101. A method of manufacturing a semiconductor chip assembly, comprising: disposing an adhesive between a chip and a conductive metal, thereby mechanically attaching the chip to the conductive metal, wherein the chip includes upper and lower surfaces, the upper surface includes a pad, the conductive metal is a single metallic material that includes top, middle and bottom surfaces, the top surface faces in an opposite direction to the middle and bottom surfaces, the routing line is a protrusion that is integral with the middle surface and extends beneath the middle surface to the bottom surface, the routing line is disposed above and overlaps the pad, the upper and middle surfaces face one another, the upper and bottom surfaces face one another, the adhesive contacts the upper and bottom surfaces and the adhesive contacts and is sandwiched between the routing line and the pad; applying an etch to a portion of the top surface, thereby etching partially but not completely through a thickness of the conductive metal and removing a portion of the conductive metal directly above the routing line and forming a top surface of the routing line proximate to the middle surface while the routing line is disposed above and overlaps the pad and the adhesive contacts and is sandwiched between the routing line and the pad; applying an etch to the adhesive, thereby exposing the chip while the routing line is disposed above and overlaps the pad and the adhesive contacts and is sandwiched between the routing line and the pad; electrically connecting the routing line and the pad; and then forming an insulative base over the routing line.
102. The method of claim 101 , including applying an etch that forms a pillar in the opposite side of the conductive metal that extends to the top surface and is connected to and extends above the routing line and does not overlap the pad.
103. The method of claim 102 , including forming the pillar before electrically connecting the routing line and the pad.
104. The method of claim 102 , including forming the pillar after electrically connecting the routing line and the pad.
105. The method of claim 102 , including forming the pillar before forming the insulative base, wherein forming the insulative base includes simultaneously disposing the insulative base over the routing line and a lower portion of the pillar without disposing the insulative base over an upper portion of the pillar.
106. The method of claim 102 , including forming the pillar after partially forming the insulative base, wherein forming the insulative base includes disposing a first portion of the insulative base over the routing line after electrically connecting the routing line and the pad and before forming the pillar, and then disposing a second portion of the insulative base over the first portion of the insulative base and a lower portion of the pillar without disposing the second portion of the insulative base over an upper portion of the pillar.
107. The method of claim 101 , including applying an etch to a portion of the bottom surface, thereby etching partially but not completely through a thickness of the conductive metal to form outer edges of the routing line that extend between the middle and bottom surfaces.
108. The method of claim 101 , including encapsulating the chip using an encapsulant that contacts the lower surface of the chip after mechanically attaching the chip to the conductive metal and before applying the etch to the portion of the top surface.
109. The method of claim 101 , wherein the assembly is devoid of wire bonds, TAB leads and solder joints.
110. The method of claim 101 , wherein the chip includes a plurality of conductive pads, the conductive metal includes a plurality of routing lines, the routing lines are disposed above and overlap the pads, the routing lines are covered from above by the conductive metal before etching the conductive metal, and the routing lines are exposed by etching the conductive metal.
111. A method of manufacturing a semiconductor chip assembly, comprising: providing a conductive metal layer with top and bottom surfaces, wherein the conductive metal layer is a single metallic material; providing a bottom etch mask under the bottom surface, wherein the bottom etch mask includes an opening that exposes a portion of the bottom surface; applying an etch to the exposed portion of the bottom surface through the opening in the bottom etch mask, thereby etching partially but not completely through the conductive metal layer to form outer edges of a routing line that extends to the bottom surface; mechanically attaching a chip to the conductive metal layer using an adhesive, wherein the chip includes upper and lower surfaces, the upper surface includes a pad, the routing line is disposed above and overlaps the pad, the upper and bottom surfaces face one another, the adhesive contacts the upper and bottom surfaces and the adhesive contacts and is sandwiched between the routing line and the pad; providing a top etch mask over the top surface, wherein the top etch mask includes an opening that exposes a portion of the top surface; applying an etch to the exposed portion of the top surface through the opening in the top etch mask, thereby etching partially but not completely through the conductive metal layer and removing a portion of the conductive metal layer above the routing line and the pad to (i) form a top surface of the routing line contiguous with the outer edges of the routing line and (ii) expose the adhesive; applying an etch to the adhesive, thereby exposing the chip; and electrically connecting the routing line and the pad.
112. The method of claim 111 , wherein applying the etch to the exposed portion of the bottom surface removes a first thickness of the conductive metal layer, applying the etch to the exposed portion of the top surface removes a second thickness of the conductive metal layer, and the second thickness is at least twice the first thickness.
113. The method of claim 111 , wherein applying the etch to the adhesive includes applying a laser that ablates the adhesive.
114. The method of claim 111 , wherein the routing line overlaps only one peripheral edge of the pad.
115. The method of claim 111 wherein the routing line overlaps only two peripheral edges of the pad, and the two peripheral edges are opposite one another.
116. The method of claim 111 , wherein electrically connecting the routing line and the pad includes forming a connection joint that contacts a surface of the routing line that is disposed above and overlaps and faces away from the pad.
117. The method of claim 116 , wherein the connection joint is the only electrical conductor external to the chip that contacts the pad.
118. The method of claim 116 , wherein the connection joint and the adhesive are the only materials external to the chip that contact the pad.
119. The method of claim 116 , wherein the connection joint and the adhesive are the only materials that contact both the conductive trace and the pad.
120. The method of claim 111 , wherein the steps are performed in the sequence set forth.
121. A method of manufacturing a semiconductor chip assembly, comprising: providing a conductive metal layer with top and bottom surfaces, wherein the conductive metal layer is a single metallic material; providing a bottom etch mask under the bottom surface, wherein the bottom etch mask includes an opening that exposes a portion of the bottom surface; applying an etch to the exposed portion of the bottom surface through the opening in the bottom etch mask, thereby etching partially but not completely through the conductive metal layer to form outer edges of a routing line; mechanically attaching a chip to the conductive metal layer using an adhesive, wherein the chip includes upper and lower surfaces, the upper surface includes a pad, the routing line is disposed above and overlaps the pad, the upper and bottom surfaces face one another, the adhesive contacts the upper and bottom surfaces and the adhesive contacts and is sandwiched between the routing line and the pad; providing a top etch mask over the top surface, wherein the top etch mask includes an opening that exposes a portion of the top surface; applying an etch to the exposed portion of the top surface through the opening in the top etch mask, thereby etching partially but not completely through the conductive metal layer and removing a portion of the conductive metal layer above the routing line and the pad to (i) form a top surface of the routing line that is contiguous with the outer edges of the routing line, (ii) expose the adhesive and (iii) form a pillar that is connected to the routing line and extends above the routing line and does not overlap the pad; applying an etch to the adhesive, thereby exposing the chip; and electrically connecting the routing line and the pad.
122. The method of claim 121 , wherein applying the etch to the exposed portion of the bottom surface removes a first thickness of the conductive metal layer, applying the etch to the exposed portion of the top surface removes a second thickness of the conductive metal layer, and the second thickness is at least twice the first thickness.
123. The method of claim 121 , wherein applying the etch to the adhesive includes applying a laser that ablates the adhesive.
124. The method of claim 121 , wherein the routing line overlaps only one peripheral edge of the pad.
125. The method of claim 121 wherein the routing line overlaps only two peripheral edges of the pad, and the two peripheral edges are opposite one another.
126. The method of claim 121 , wherein electrically connecting the routing line and the pad includes forming a connection joint that contacts a surface of the routing line that is disposed above and overlaps and faces away from the pad.
127. The method of claim 126 , wherein the connection joint is the only electrical conductor external to the chip that contacts the pad.
128. The method of claim 126 , wherein the connection joint and the adhesive are the only materials external to the chip that contact the pad.
129. The method of claim 126 , wherein the connection joint and the adhesive are the only materials that contact both the conductive trace and the pad.
130. The method of claim 121 , wherein the steps are performed in the sequence set forth.
131. A method of manufacturing a semiconductor chip assembly, comprising: providing a conductive metal layer with top and bottom surfaces, wherein the conductive metal layer is a single metallic material; providing a bottom etch mask under the bottom surface, wherein the bottom etch mask includes an opening that exposes a portion of the bottom surface; applying an etch to the exposed portion of the bottom surface through the opening in the bottom etch mask, thereby etching partially but not completely through the conductive metal layer to form outer edges of a routing line; mechanically attaching a chip to the conductive metal layer using an adhesive, wherein the chip includes upper and lower surfaces, the routing line is disposed above and overlaps the pad, the upper and bottom surfaces face one another, the adhesive contacts the upper and bottom surfaces and the adhesive contacts and is sandwiched between the routing line and the pad; providing a first top etch mask over the top surface, wherein the first top etch mask includes an opening that exposes a first portion of the top surface; applying an etch to the exposed first portion of the top surface through the opening in the first top etch mask, thereby etching partially but not completely through the conductive metal layer and removing a portion of the conductive metal layer above the routing line and the pad to (i) form a first portion of a top surface of the routing line that is contiguous with the outer edges of the routing line and (ii) expose the adhesive; applying an etch to the adhesive, thereby exposing the chip; electrically connecting the routing line and the pad; forming a first portion of an insulative base over the first portion of the top surface of the routing line; providing a second top etch mask over the top surface of the conductive metal layer, wherein the second top etch mask includes an opening that exposes a second portion of the top surface of the conductive metal layer; applying an etch to the exposed second portion of the top surface of the conductive metal layer through the opening in the second top etch mask, thereby etching partially but not completely through the conductive metal layer and removing a portion of the conductive metal layer above the routing line to (i) form a pillar that is connected to the routing line and extends above the routing line and does not overlap the pad and (ii) form a second portion of a top surface of the routing line that extends between the pillar and the first portion of the top surface of the routing line and is contiguous with the outer edges of the routing line; and forming a second portion of the insulative base over the first portion of the insulative base and the second portion of the top surface of the routing line and a lower portion of the pillar and not over an upper portion of the pillar.
132. The method of claim 131 , wherein applying the etch to the exposed portion of the bottom surface removes a first thickness of the conductive metal layer, applying the etch to the exposed portion of the top surface removes a second thickness of the conductive metal layer, and the second thickness is at least twice the first thickness.
133. The method of claim 131 , wherein applying the etch to the adhesive includes applying a laser that ablates the adhesive.
134. The method of claim 131 , wherein the routing line overlaps only one peripheral edge of the pad.
135. The method of claim 131 wherein the routing line overlaps only two peripheral edges of the pad, and the two peripheral edges are opposite one another.
136. The method of claim 131 , wherein electrically connecting the routing line and the pad includes forming a connection joint that contacts a surface of the routing line that is disposed above and overlaps and faces away from the pad.
137. The method of claim 136 , wherein the connection joint is the only electrical conductor external to the chip that contacts the pad.
138. The method of claim 136 , wherein the connection joint and the adhesive are the only materials external to the chip that contact the pad.
139. The method of claim 136 , wherein the connection joint and the adhesive are the only materials that contact both the conductive trace and the pad.
140. The method of claim 131 , wherein the steps are performed in the sequence set forth.
141. A method of manufacturing a semiconductor chip assembly, comprising: providing a semiconductor chip, a conductive metal and an adhesive, wherein the chip includes upper and lower surfaces, the upper surface includes a conductive pad, the conductive metal is a single metallic material that includes a routing line, the routing line is disposed above the chip, and the adhesive contacts and is sandwiched between the routing line and the chip; then etching the conductive metal on a side opposite the routing line, thereby exposing the routing line; etching the adhesive, thereby exposing the chip; and electrically connecting the routing line and the pad.
142. The method of claim 141 , wherein etching the conductive metal removes a portion of the conductive metal that is above the routing line and overlaps the pad.
143. The method of claim 142 , wherein etching the conductive metal exposes a portion of the adhesive that is outside the routing line and overlaps the pad.
144. The method of claim 143 , wherein the conductive metal and the pad are electrically isolated from one another after etching the conductive metal and etching the adhesive and before electrically connecting the routing line and the pad.
145. The method of claim 141 , including etching the conductive metal to form the routing line before etching the conductive metal on the opposite side.
146. The method of claim 141 , including etching the conductive metal on the opposite side to form a pillar that is connected to and extends above the routing line and does not overlap the pad.
147. The method of claim 146 , including electrically connecting the routing line and the pad before forming the pillar.
148. The method of claim 146 , including electrically connecting the routing line and the pad after forming the pillar.
149. The method of claim 141 , wherein the conductive metal is a continuous strip of copper.
150. The method of claim 141 , wherein the upper surface includes a plurality of conductive pads, the conductive metal includes a plurality of routing lines, the routing lines are disposed above the chip, the routing lines are covered by the conductive metal before etching the conductive metal, and the routing lines are exposed by etching the conductive metal.
151. A method of manufacturing a semiconductor chip assembly, comprising: providing a semiconductor chip that includes upper and lower surfaces, wherein the upper surface includes a conductive pad; providing a conductive metal that includes a routing line and a base, wherein the base is disposed above and covers and is wider than and is integral with and is the same metallic material as the routing line, and the routing line includes outer edges that are covered by the base and extend between a bottom surface of the base and a bottom surface of the routing line; then disposing an adhesive between the chip and the conductive metal, thereby mechanically attaching the chip to the conductive metal such that the routing line is disposed above the chip and the adhesive contacts and is sandwiched between the routing line and the chip; etching partially but not completely through the conductive metal on a side opposite the routing line, thereby removing a portion of the conductive metal directly above the routing line and forming a recessed portion in the conductive metal that provides a top surface for the routing line and is contiguous with the outer edges of the routing line while the routing line is disposed above the chip and the adhesive contacts and is sandwiched between the routing line and the chip; etching the adhesive, thereby exposing the chip while the routing line is disposed above the chip and the adhesive contacts and is sandwiched between the routing line and the chip; and electrically connecting the routing line and the pad.
152. The method of claim 151 , wherein etching the adhesive includes applying a laser to the adhesive.
153. The method of claim 151 , wherein the routing line overlaps only one peripheral edge of the pad.
154. The method of claim 151 wherein the routing line overlaps only two peripheral edges of the pad, and the two peripheral edges are opposite one another.
155. The method of claim 151 , wherein electrically connecting the routing line and the pad includes forming a connection joint that contacts a surface of the routing line that faces away from the pad.
156. The method of claim 155 , wherein the connection joint is the only electrical conductor external to the chip that contacts the pad.
157. The method of claim 155 , wherein the connection joint and the adhesive are the only materials external to the chip that contact the pad.
158. The method of claim 155 , wherein the connection joint and the adhesive are the only materials that contact both the conductive trace and the pad.
159. The method of claim 151 , including encapsulating the chip after mechanically attaching the chip to the conductive metal and before etching the conductive metal.
160. The method of claim 151 , including etching the conductive metal on the opposite side to form a pillar that is connected to and extends above the routing line and does not overlap the pad, and forming an insulative base over the routing line and a lower portion of the pillar but not over an upper portion of the pillar.
161. The method of claim 160 , including forming the recessed portion and the pillar simultaneously.
162. The method of claim 160 , including forming the recessed portion before forming the pillar.
163. The method of claim 160 , including electrically connecting the routing line and the pad before forming the pillar.
164. The method of claim 160 , including electrically connecting the routing line and the pad after forming the pillar.
165. The method of claim 160 , wherein the pillar has a flat top surface and a diameter that is narrowest at the top surface.
166. The method of claim 160 , wherein the pillar extends a first distance above the recessed portion, the insulative base extends a second distance above the recessed portion, and the first distance is at least twice the second distance.
167. The method of claim 160 , wherein the pillar extends at least 100 microns above the insulative base.
168. The method of claim 160 , wherein the conductive metal is copper and the insulative base is epoxy.
169. The method of claim 151 , wherein the assembly is devoid of wire bonds, TAB leads and solder joints.
170. The method of claim 151 , wherein the upper surface includes a plurality of conductive pads, the conductive metal includes a plurality of routing lines, the base is disposed above and covers and is wider than and is integral with and is the same metallic material as the routing lines, the routing lines are disposed above the chip, the routing lines are covered by the base before etching the conductive metal, and the routing lines are exposed by etching the conductive metal.
171. A method of manufacturing a semiconductor chip assembly, comprising: disposing an adhesive between a chip and a conductive metal, thereby mechanically attaching the chip to the conductive metal, wherein the chip includes upper and lower surfaces, the upper surface includes a pad, the conductive metal is a single metallic material that includes top, middle and bottom surfaces, the top surface faces in an opposite direction to the middle and bottom surfaces, the routing line is a protrusion that is integral with the middle surface and extends beneath the middle surface to the bottom surface, the routing line is disposed above the chip, the upper and middle surfaces face one another, the upper and bottom surfaces face one another, the adhesive contacts the upper and bottom surfaces and the adhesive contacts and is sandwiched between the routing line and the chip; applying an etch to a portion of the top surface, thereby etching partially but not completely through a thickness of the conductive metal and removing a portion of the conductive metal directly above the routing line and forming a top surface of the routing line proximate to the middle surface while the routing line is disposed above the chip and the adhesive contacts and is sandwiched between the routing line and the chip; applying an etch to the adhesive, thereby exposing the chip while the routing line is disposed above the chip and the adhesive contacts and is sandwiched between the routing line and the chip; electrically connecting the routing line and the pad; and then forming an insulative base over the routing line.
172. The method of claim 171 , including applying an etch that forms a pillar in the opposite side of the conductive metal that extends to the top surface and is connected to and extends above the routing line and does not overlap the pad.
173. The method of claim 172 , including forming the pillar before electrically connecting the routing line and the pad.
174. The method of claim 172 , including forming the pillar after electrically connecting the routing line and the pad.
175. The method of claim 172 , including forming the pillar before forming the insulative base, wherein forming the insulative base includes simultaneously disposing the insulative base over the routing line and a lower portion of the pillar without disposing the insulative base over an upper portion of the pillar.
176. The method of claim 172 , including forming the pillar after partially forming the insulative base, wherein forming the insulative base includes disposing a first portion of the insulative base over the routing line after electrically connecting the routing line and the pad and before forming the pillar, and then disposing a second portion of the insulative base over the first portion of the insulative base and a lower portion of the pillar without disposing the second portion of the insulative base over an upper portion of the pillar.
177. The method of claim 171 , including applying an etch to a portion of the bottom surface, thereby etching partially but not completely through a thickness of the conductive metal to form outer edges of the routing line that extend between the middle and bottom surfaces.
178. The method of claim 171 , including encapsulating the chip using an encapsulant that contacts the lower surface of the chip after mechanically attaching the chip to the conductive metal and before applying the etch to the portion of the top surface.
179. The method of claim 171 , wherein the assembly is devoid of wire bonds, TAB leads and solder joints.
180. The method of claim 171 , wherein the upper surface includes a plurality of conductive pads, the conductive metal includes a plurality of routing lines, the routing lines are disposed above the chip, the routing lines are covered from above by the conductive metal before etching the conductive metal, and the routing lines are exposed by etching the conductive metal.
181. A method of manufacturing a semiconductor chip assembly, comprising: providing a conductive metal layer with top and bottom surfaces, wherein the conductive metal layer is a single metallic material; providing a bottom etch mask under the bottom surface, wherein the bottom etch mask includes an opening that exposes a portion of the bottom surface; applying an etch to the exposed portion of the bottom surface through the opening in the bottom etch mask, thereby etching partially but not completely through the conductive metal layer to form outer edges of a routing line that extends to the bottom surface; mechanically attaching a chip to the conductive metal layer using an adhesive, wherein the chip includes upper and lower surfaces, the upper surface includes a pad, the routing line is disposed above the chip, the upper and bottom surfaces face one another, the adhesive contacts the upper and bottom surfaces and the adhesive contacts and is sandwiched between the routing line and the chip; providing a top etch mask over the top surface, wherein the top etch mask includes an opening that exposes a portion of the top surface; applying an etch to the exposed portion of the top surface through the opening in the top etch mask, thereby etching partially but not completely through the conductive metal layer and removing a portion of the conductive metal layer above the routing line and the pad to (i) form a top surface of the routing line contiguous with the outer edges of the routing line and (ii) expose the adhesive; applying an etch to the adhesive, thereby exposing the chip; and electrically connecting the routing line and the pad.
182. The method of claim 181 , wherein applying the etch to the exposed portion of the bottom surface removes a first thickness of the conductive metal layer, applying the etch to the exposed portion of the top surface removes a second thickness of the conductive metal layer, and the second thickness is at least twice the first thickness.
183. The method of claim 181 , wherein applying the etch to the adhesive includes applying a laser that ablates the adhesive.
184. The method of claim 181 , wherein the routing line overlaps only one peripheral edge of the pad.
185. The method of claim 181 wherein the routing line overlaps only two peripheral edges of the pad, and the two peripheral edges are opposite one another.
186. The method of claim 181 , wherein electrically connecting the routing line and the pad includes forming a connection joint that contacts a surface of the routing line that faces away from the pad.
187. The method of claim 186 , wherein the connection joint is the only electrical conductor external to the chip that contacts the pad.
188. The method of claim 186 , wherein the connection joint and the adhesive are the only materials external to the chip that contact the pad.
189. The method of claim 186 , wherein the connection joint and the adhesive are the only materials that contact both the conductive trace and the pad.
190. The method of claim 181 , wherein the steps are performed in the sequence set forth.
191. A method of manufacturing a semiconductor chip assembly, comprising: providing a conductive metal layer with top and bottom surfaces, wherein the conductive metal layer is a single metallic material; providing a bottom etch mask under the bottom surface, wherein the bottom etch mask includes an opening that exposes a portion of the bottom surface; applying an etch to the exposed portion of the bottom surface through the opening in the bottom etch mask, thereby etching partially but not completely through the conductive metal layer to form outer edges of a routing line; mechanically attaching a chip to the conductive metal layer using an adhesive, wherein the chip includes upper and lower surfaces, the upper surface includes a pad, the routing line is disposed above the chip, the upper and bottom surfaces face one another, the adhesive contacts the upper and bottom surfaces and the adhesive contacts and is sandwiched between the routing line and the chip; providing a top etch mask over the top surface, wherein the top etch mask includes an opening that exposes a portion of the top surface; applying an etch to the exposed portion of the top surface through the opening in the top etch mask, thereby etching partially but not completely through the conductive metal layer and removing a portion of the conductive metal layer above the routing line and the pad to (i) form a top surface of the routing line that is contiguous with the outer edges of the routing line, (ii) expose the adhesive and (iii) form a pillar that is connected to the routing line and extends above the routing line and does not overlap the pad; applying an etch to the adhesive, thereby exposing the chip; and electrically connecting the routing line and the pad.
192. The method of claim 191 , wherein applying the etch to the exposed portion of the bottom surface removes a first thickness of the conductive metal layer, applying the etch to the exposed portion of the top surface removes a second thickness of the conductive metal layer, and the second thickness is at least twice the first thickness.
193. The method of claim 191 , wherein applying the etch to the adhesive includes applying a laser that ablates the adhesive.
194. The method of claim 191 , wherein the routing line overlaps only one peripheral edge of the pad.
195. The method of claim 191 wherein the routing line overlaps only two peripheral edges of the pad, and the two peripheral edges are opposite one another.
196. The method of claim 191 , wherein electrically connecting the routing line and the pad includes forming a connection joint that contacts a surface of the routing line that faces away from the pad.
197. The method of claim 196 , wherein the connection joint is the only electrical conductor external to the chip that contacts the pad.
198. The method of claim 196 , wherein the connection joint and the adhesive are the only materials external to the chip that contact the pad.
199. The method of claim 196 , wherein the connection joint and the adhesive are the only materials that contact both the conductive trace and the pad.
200. The method of claim 191 , wherein the steps are performed in the sequence set forth.
201. A method of manufacturing a semiconductor chip assembly, comprising: providing a conductive metal layer with top and bottom surfaces, wherein the conductive metal layer is a single metallic material; providing a bottom etch mask under the bottom surface, wherein the bottom etch mask includes an opening that exposes a portion of the bottom surface; applying an etch to the exposed portion of the bottom surface through the opening in the bottom etch mask, thereby etching partially but not completely through the conductive metal layer to form outer edges of a routing line; mechanically attaching a chip to the conductive metal layer using an adhesive, wherein the chip includes upper and lower surfaces, the routing line is disposed above the chip, the upper and bottom surfaces face one another, the adhesive contacts the upper and bottom surfaces and the adhesive contacts and is sandwiched between the routing line and the chip; providing a first top etch mask over the top surface, wherein the first top etch mask includes an opening that exposes a first portion of the top surface; applying an etch to the exposed first portion of the top surface through the opening in the first top etch mask, thereby etching partially but not completely through the conductive metal layer and removing a portion of the conductive metal layer above the routing line and the pad to (i) form a first portion of a top surface of the routing line that is contiguous with the outer edges of the routing line and (ii) expose the adhesive; applying an etch to the adhesive, thereby exposing the chip; electrically connecting the routing line and the pad; forming a first portion of an insulative base over the first portion of the top surface of the routing line; providing a second top etch mask over the top surface of the conductive metal layer, wherein the second top etch mask includes an opening that exposes a second portion of the top surface of the conductive metal layer; applying an etch to the exposed second portion of the top surface of the conductive metal layer through the opening in the second top etch mask, thereby etching partially but not completely through the conductive metal layer and removing a portion of the conductive metal layer above the routing line to (i) form a pillar that is connected to the routing line and extends above the routing line and does not overlap the pad and (ii) form a second portion of a top surface of the routing line that extends between the pillar and the first portion of the top surface of the routing line and is contiguous with the outer edges of the routing line; and forming a second portion of the insulative base over the first portion of the insulative base and the second portion of the top surface of the routing line and a lower portion of the pillar and not over an upper portion of the pillar.
202. The method of claim 201 , wherein applying the etch to the exposed portion of the bottom surface removes a first thickness of the conductive metal layer, applying the etch to the exposed portion of the top surface removes a second thickness of the conductive metal layer, and the second thickness is at least twice the first thickness.
203. The method of claim 201 , wherein applying the etch to the adhesive includes applying a laser that ablates the adhesive.
204. The method of claim 201 , wherein the routing line overlaps only one peripheral edge of the pad.
205. The method of claim 201 wherein the routing line overlaps only two peripheral edges of the pad, and the two peripheral edges are opposite one another.
206. The method of claim 201 , wherein electrically connecting the routing line and the pad includes forming a connection joint that contacts a surface of the routing line that faces away from the pad.
207. The method of claim 206 , wherein the connection joint is the only electrical conductor external to the chip that contacts the pad.
208. The method of claim 206 , wherein the connection joint and the adhesive are the only materials external to the chip that contact the pad.
209. The method of claim 206 , wherein the connection joint and the adhesive are the only materials that contact both the conductive trace and the pad.
210. The method of claim 201 , wherein the steps are performed in the sequence set forth.
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June 11, 2001
April 8, 2003
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