To minimize and stably suppress worsening of a warpage of a wafer in epitaxial treatment. A semiconductor wafer is flattened by a double-sided grinding machine. Machining strains produced at both sides of the semiconductor wafer are removed to measure a direction of the warpage of the semiconductor wafer. The direction of the warpage is adjusted and then, epitaxial treatment is performed.
Legal claims defining the scope of protection, as filed with the USPTO.
1. An epitaxial semiconductor wafer manufacturing method of measuring a direction of a warpage of a semiconductor wafer, adjusting the warpage direction, and executing epitaxial treatment, comprising: flattening said semiconductor wafer by a double-sided grinding machine; removing a machining-strain layer formed on both faces of the semiconductor wafer due to the flattening; and measuring the direction of the warpage of the semiconductor wafer, after removing the machining-strain.
2. The epitaxial semiconductor wafer manufacturing method according to claim 1 , wherein the machining-strain layer is removed by an inverting single-sided grinding machine.
3. The epitaxial semiconductor semiconductor wafer manufacturing method according to claim 1 , wherein the direction of the warpage of the semiconductor wafer is measured, then adjusted, and marked.
4. The epitaxial semiconductor wafer manufacturing method according to claim 1 , wherein a machining-strain layer is removed, the direction of the warpage is adjusted, mirror polishing is performed, and epitaxial treatment is executed.
5. The epitaxial semiconductor wafer manufacturing method according to claim 4 , wherein etching is performed before said mirror polishing.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
February 5, 2002
July 29, 2003
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