A first semiconductor chip is mounted on a substrate on which an interconnect pattern is formed, and a surface of the first semiconductor chip having electrodes faces the substrate. A second semiconductor chip is mounted on the first semiconductor chip. Electrodes of the second semiconductor chip are electrically connected to the interconnect pattern by wires. A first resin is provided between the first semiconductor chip and the substrate, and a second resin which differs from the first resin seals the first and second semiconductor chips.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A semiconductor device comprising: a first semiconductor chip which has a surface having a plurality of electrodes and is mounted on a substrate having an interconnect pattern, wherein the surface having the electrodes faces the substrate and the electrodes are electrically connected to the interconnect pattern; a second semiconductor chip which has a surface having a plurality of electrodes and is mounted on the first semiconductor chip, wherein the surface of the second semiconductor chip having the electrodes opposes the first semiconductor chip and the electrodes of the second semiconductor chip are electrically connected to the interconnect pattern through wires; a first resin provided between the substrate and the first semiconductor chip; and a second resin which differs from the first resin and seals the first and second semiconductor chips to the substrate, wherein the first resin is provided so as to extend to the sides of both the first semiconductor chip and the second semiconductor chip.
2. The semiconductor device as defined in claim 1 , wherein: the first resin is an anisotropic conductive material containing conductive particles; and the electrodes of the first semiconductor chip are electrically connected to the interconnect pattern through the conductive particles.
3. The semiconductor device as defined in claim 1 , wherein: a plurality of penetrating holes are formed in the substrate; the interconnect pattern is formed on one surface of the substrate, part of the interconnect pattern extending over the penetrating holes; and a plurality of external terminals are formed on the interconnect pattern to project from a surface of the substrate opposite to the surface on which the interconnect pattern is formed through the penetrating holes.
4. The semiconductor device as defined in claim 1 , further comprising: a plurality of lands for external terminals which are electrically connected to the interconnect pattern.
5. The semiconductor device as defined in claim 1 , wherein the substrate is a glass epoxy substrate.
6. The semiconductor device as defined in claim 1 , wherein the second semiconductor chip is bonded to the first semiconductor chip through an adhesive.
7. The semiconductor device as defined in claim 1 , wherein the first semiconductor chip is larger than the second semiconductor chip.
8. The semiconductor device as defined in claim 1 , wherein the first and second semiconductor chips are equal in size.
9. The semiconductor device as defined in claim 1 , wherein the first semiconductor chip is smaller than the second semiconductor chip.
10. The semiconductor device as defined in claim 9 , wherein the first resin is provided so as to extend to the sides of the first semiconductor chip and to a region of the second semiconductor chip which faces the substrate but avoids facing the first semiconductor chip.
11. A circuit board equipped with the semiconductor device as defined in claim 1 .
12. Electronic equipment comprising the semiconductor device as defined in claim 1 .
13. A semiconductor device comprising: a first semiconductor chip which has a surface having a plurality of electrodes and is mounted on a substrate having an interconnect pattern, wherein the surface having the electrodes faces the substrate and the electrodes are electrically connected to the interconnect pattern; a second semiconductor chip which has a surface having a plurality of electrodes and is mounted on the first semiconductor chip, wherein the surface of the second semiconductor chip having the electrodes opposes the first semiconductor chip and the electrodes of the second semiconductor chip are electrically connected to the interconnect pattern through wires; a first resin provided between the substrate and the first semiconductor chip; and a second resin which differs from the first resin and seals the first and second semiconductor chips to the substrate, wherein the first semiconductor chip is larger than the second semiconductor chip such that the first semiconductor chip has a protruding upper surface that protrudes beyond the second semiconductor chip, and the protruding upper surface is entirely covered with the second resin.
14. The semiconductor device as defined in claim 13 , wherein the first resin is provided so as to extend to the sides of the first semiconductor chip.
15. A semiconductor device comprising: a first semiconductor chip which has a surface having a plurality of electrodes and is mounted on a substrate having an interconnect pattern, wherein the surface having the electrodes faces the substrate and the electrodes are electrically connected to the interconnect pattern; a second semiconductor chip which has a surface having a plurality of electrodes and is mounted on the first semiconductor chip, wherein the surface of the second semiconductor chip having the electrodes opposes the first semiconductor chip and the electrodes of the second semiconductor chip are electrically connected to the interconnect pattern through wires; a first resin provided between the substrate and the first semiconductor chip; and a second resin which differs from the first resin and seals the first and second semiconductor chips to the substrate, wherein the first semiconductor chip is smaller than the second semiconductor chip such that the second semiconductor chip has a protruding bottom surface that protrudes beyond the first semiconductor chip and an opposing bottom surface that opposes the first semiconductor chip, and the first resin is provided so as to touch the protruding bottom surface and avoid the opposing bottom surface.
16. The semiconductor device as defined in claim 15 , wherein the second semiconductor chip is bonded to the first semiconductor chip through an adhesive which differs from the first resin.
17. A method of fabricating a semiconductor device comprising the steps of: face-down bonding a first semiconductor chip to a substrate on which an interconnect pattern is formed; mounting a second semiconductor chip on the first semiconductor chip; electrically connecting the second semiconductor chip to the interconnect pattern through wires; providing a first resin between the first semiconductor chip and the substrate; and sealing the first and second semiconductor chips with a second resin which differs from the first resin; wherein the first resin is provided so as to extend to the sides of both the first semiconductor chip and the second semiconductor chip.
18. The method of fabricating a semiconductor device as defined in claim 17 , wherein: the first resin is an anisotropic conductive material containing conductive particles; and electrodes of the first semiconductor chip are electrically connected to the interconnect pattern through the conductive particles.
19. The method of fabricating a semiconductor device as defined in claim 17 , wherein the second semiconductor chip is bonded to the first semiconductor chip through an adhesive in the step of mounting the second semiconductor chip.
20. The method of fabricating a semiconductor device as defined in claim 17 , wherein: the first semiconductor chip is larger than the second semiconductor chip; and after the step of bonding the first semiconductor chip and the step of providing the first resin, at lease one of the first semiconductor chip and the substrate is pressed against the other to extend the first resin to the sides of the first semiconductor chip.
21. The method of fabricating a semiconductor device as defined in claim 17 , wherein: the first and second semiconductor chips are equal in size; and after the step of bonding the first semiconductor chip and the step of providing the first resin, at least one of the first semiconductor chip and the substrate is pressed against the other to extend the first resin to at least the sides of the first semiconductor chip among the sides of the first and second semiconductor chips.
22. The method of fabricating a semiconductor device as defined in claim 17 , wherein: the first semiconductor chip is smaller than the second semiconductor chip; and after the step of bonding the first semiconductor chip and the step of providing the first resin, at least one of the first semiconductor chip and the substrate is pressed against the other to extend the first resin to the sides of the first semiconductor chip and to a region of the second semiconductor chip which faces the substrate but avoids facing the first semiconductor chip.
23. The method of fabricating a semiconductor device as defined in claim 17 , wherein: the wires are bonded by ultrasonic waves in the step of connecting through the wires.
24. The method of fabricating a semiconductor device as defined in claim 23 , wherein: after bonding electrodes of the second semiconductor chip to the wires, the wires are bonded to the interconnect pattern, in the step of connecting through the wires.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
April 27, 2001
September 16, 2003
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