In a semiconductor structure, interconnects between regions of a single device or different devices are achieved by forming metal plugs that span across the regions to be interconnected, wherein the plugs are formed from the metal used in forming a silicide layer on the structure. The metal is masked off in desired areas prior to etching, to leave the metal plugs.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A semiconductor device, comprising a polysilicon gate, a n composite defining a source region a n composite defining a drain region a plurality of polysilicon drain regions extending between a drain contact and the drain region, and a silicide layer, wherein at least one of the polysilicon drain regions is connected to the n drain composite by a metal plug made of the same material as the metal of the silicide layer.
2. A semiconductor device of claim 1 , wherein more than one polysilicon drain region is connected to the n drain composite by means of one or more of said metal plugs.
3. A semiconductor device of claim 2 , wherein the metal plugs are cobalt plugs.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
October 31, 2002
March 16, 2004
Browse 5M+ US patents with plain-English claim translations and AI-generated analysis.