In a semiconductor integrated circuit device, a polycrystalline silicon film is formed along an inner wall of a trench in which a capacitor is to be formed, and the polycrystalline silicon film and a lower electrode is contacted to each other on the entire inner wall of the trench. Oxygen permeated into the lower electrode during a thermal treatment of a tantalum oxide film is consumed at an interface between the polycrystalline silicon film and the lower electrode. Thus, oxygen does not reach the surface of a silicon plug below the lower electrode that would cause oxidation on the surface of the silicon plug and form a high-resistance oxide layer when a dielectric film formed on a lower electrode of a capacitor of a DRAM is subjected to a thermal treatment in an oxygen atmosphere.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A semiconductor integrated circuit device, comprising: a first insulating film formed over a main surface of a semiconductor substrate and having a first connection hole in which a first conductive layer is buried; a second insulating film formed over the first insulating film and having a trench over the first connection hole; and a capacitor formed in the trench, wherein the capacitor comprises a lower electrode constituted by a second conductive layer formed over a sidewall and bottom surface of the trench; a capacitor insulating film formed over the lower electrode; and an upper electrode constituted by a third conductive layer formed over the capacitor insulating film, and a metal silicide layer electrically connected to the first conductive layer in the first connection hole is provided between the sidewall and bottom surface of the trench and the lower electrode, wherein a fourth conductive layer made of polycrystalline silicon is further formed between the sidewall and bottom surface of the trench and the metal silicide layer.
2. The semiconductor integrated circuit device according to claim 1 , wherein the metal silicide layer is formed so as to cover an entire surface of the sidewall and bottom surface of the trench.
3. The semiconductor integrated circuit device according to claim 1 , wherein an oxide layer with a thickness of 1 nm or less is further formed between the second conductive layer constituting the lower electrode and the metal silicide layer.
4. The semiconductor integrated circuit device according to claim 1 , wherein the first conductive layer in the first connection hole is made of silicon.
5. The semiconductor integrated circuit device according to claim 1 , wherein the second conductive layer constituting the lower electrode is made of platinum group metal, and the metal silicide layer is made of metal other than the platinum group metal.
6. The semiconductor integrated circuit device according to claim 1 , wherein the metal silicide layer is made of titanium silicide.
7. The semiconductor integrated circuit device according to claim 1 , wherein the second conductive layer constituting the lower electrode is made of ruthenium.
8. The semiconductor integrated circuit device according to claim 1 , wherein the capacitor insulating film is made of tantalum oxide.
9. A semiconductor integrated circuit device, comprising: a first insulating film formed over a main surface of a semiconductor substrate and having a first connection hole in which a first conductive layer is buried; a second insulating film formed over the first insulating film and having a trench over the first connection hole; and a capacitor formed in the trench, wherein the capacitor comprises a lower electrode constituted by a second conductive layer formed over a sidewall and bottom surface of the trench; a capacitor insulating film formed over the lower electrode; and an upper electrode constituted by a third conductive layer formed over the capacitor insulating film, and a metal silicide layer electrically connected to the first conductive layer in the first connection hole is provided between the sidewall and bottom surface of the trench and the lower electrode, wherein a fourth conductive layer made of polycrystalline silicon is further formed between the sidewall and bottom surface of the trench and the metal silicide layer, and wherein the metal silicide layer and the capacitor insulating film are contacted to each other at an upper end of the trench.
10. A semiconductor integrated circuit device, comprising: a first insulating film formed over a main surface of a semiconductor substrate and having a first connection hole in which a first conductive layer is buried; a second insulating film formed over the first insulating film and having a trench over the first connection hole; and a capacitor formed in the trench, wherein the capacitor comprises a lower electrode constituted by a second conductive layer formed over a sidewall and bottom surface of the trench; a capacitor insulating film formed over the lower electrode; and an upper electrode constituted by a third conductive layer formed over the capacitor insulating film, a metal silicide layer electrically connected to the first conductive layer in the first connection hole is provided between the sidewall and bottom surface of the trench and the lower electrode, and an upper end of the metal suicide layer over the sidewall of the trench terminates at a position lower than the upper end of the trench, and thus, the metal silicide layer and the capacitor insulating film are not contacted to each other, wherein a fourth conductive layer made of polycrystalline silicon is further formed between the sidewall and bottom surface of the trench and the metal silicide layer.
11. The semiconductor integrated circuit device according to claim 10 , wherein the second conductive layer constituting the lower electrode is made of platinum group metal, and the metal silicide layer is made of metal other than the platinum group metal.
12. The semiconductor integrated circuit device according to claim 10 , wherein the metal silicide layer is made of titanium silicide.
13. The semiconductor integrated circuit device according to claim 10 , wherein the first conductive layer in the first connection hole is made of silicon.
14. The semiconductor integrated circuit device according to claim 10 , wherein the second conductive layer constituting the lower electrode is made of ruthenium.
15. A semiconductor integrated circuit device, comprising: a first insulating film formed over a main surface of a semiconductor substrate and having a first connection hole in which a silicon plug is buried; a second insulating film formed over the first insulating film and having a trench over the first connection hole; and a capacitor formed in the trench, wherein the capacitor comprises a lower electrode constituted by a second conductive layer formed over a sidewall and bottom surface of the trench; a capacitor insulating film formed over the lower electrode; and an upper electrode constituted by a third conductive layer formed over the capacitor insulating film, a metal silicide layer electrically connected to the silicon plug in the first connection hole is provided between the sidewall and bottom surface of the trench and the second conductive layer, and a part of the second conductive layer is formed so as to cover an end portion of the metal silicide layer, and to contact to a sidewall of the trench, wherein a polycrystalline silicon layer is formed between the second conductive layer and the sidewall and bottom surface of the trench.
16. A semiconductor integrated circuit device, comprising: a first insulating film formed over a main surface of a semiconductor substrate and having a first connection hole in which a first conductive layer is buried; a second insulating film formed over the first insulating film and having a trench over the first connection hole; and a capacitor formed in the trench, wherein the capacitor comprises a lower electrode constituted by a second conductive layer containing organic matters or oxygen and formed over a sidewall and bottom surface of the trench; a capacitor insulating film formed over the lower electrode; and an upper electrode constituted by a third conductive layer formed over the capacitor insulating film, and a metal silicide layer electrically connected to the first conductive layer in the first connection hole is provided between the sidewall and bottom surface of the trench and the lower electrode, wherein a polycrystalline silicon layer is formed between the second conductive layer and the sidewall and bottom surface of the trench.
17. The semiconductor integrated circuit device according to claim 16 , wherein the second conductive layer is made of Ru.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
August 29, 2002
April 20, 2004
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