In a magnetic recording writing circuit, a current having a higher level than a write current is supplied for a period of time during rise and fall of the write current, and a current having a lower level than the write current is supplied for a period of time during overshoot at the rise and fall of the write current. Accordingly, the write current can recover quickly from overshoot.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A magnetic recording writing circuit comprising: a first current path that includes a first transistor circuit supplying a current; a first current mirror circuit connected in series with the first transistor circuit; and a second transistor circuit connected in series with the first current mirror circuit serving as a load transistor; a second current path that includes a third transistor circuit supplying a current; a second current mirror circuit connected in series with the third transistor circuit; and a fourth transistor circuit connected in series to the second current mirror circuit as a load transistor; and a magnetic recording head connected between the first current path and the second current path.
2. The magnetic recording writing circuit according to claim 1 , wherein the magnetic recording head is supplied with a current that is controlled by the first, second, third, and fourth transistor circuits.
3. The magnetic recording writing circuit according to claim 1 , wherein the magnetic recording head comprises a first terminal and a second terminal, the first terminal is connected between the first transistor circuit and the first current mirror circuit, and the second terminal is connected between the third transistor circuit and the second current mirror circuit.
4. The magnetic recording writing circuit according to claim 1 , wherein each of the first, second, third, and fourth transistor circuits includes two transistors connected in parallel with each other.
5. The magnetic recording writing circuit according to claim 1 , wherein at least one of the first, second, third, and fourth transistor circuits includes an MOS transistor.
6. The magnetic recording writing circuit according to claim 1 , wherein the magnetic recording head includes: an inductor; a first resistor connected in series with the inductor; a capacitor connected across the inductor and the first resistor; and a second resistor connected across the inductor and the first resistor.
7. The magnetic recording writing circuit according to claim 1 , further comprising a first protective circuit connected between the first transistor circuit and the first current mirror circuit, and a second protective circuit connected between the third transistor circuit and the second current mirror circuit.
8. The magnetic recording writing circuit according to claim 7 , wherein each of the first and second protective circuits includes an MOS transistor.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
June 12, 2001
May 4, 2004
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