An integrated circuit package is provided. The package includes a substrate having first and second surfaces and a plurality of conductive traces therebetween. A semiconductor die is mounted on the first surface of the substrate and an adapter disposed on the semiconductor die. A plurality of wire bonds connect the semiconductor die to ones of the conductive traces of the substrate, and an encapsulant encapsulates the wirebonds and a remainder of the semiconductor die. A heat spreader has a top portion in contact with the adapter and at least one sidewall extends from the top portion. At least a portion of the at least one sidewall is in contact with the substrate. A ball grid array is disposed on the second surface of the substrate, bumps of the ball grid array being in electrical connection with ones of the conductive traces.
Legal claims defining the scope of protection, as filed with the USPTO.
1. An integrated circuit package comprising: a substrate having first and second surfaces and a plurality of conductive traces therebetween; a semiconductor die mounted on said first surface of said substrate; an adapter disposed on said semiconductor die; a plurality of wire bonds connecting said semiconductor die to ones of said conductive traces of said substrate; an encapsulant for encapsulating said wirebonds and a remainder of said semiconductor die; a heat spreader having a top portion in contact with said adapter and at least one sidewall extending from said top portion, at least a portion of said at least one sidewall in contact with said substrate; and a ball grid array disposed on said second surface of said substrate, bumps of said ball grid array being in electrical connection with ones of said conductive traces.
2. The integrated circuit package according to claim 1 , wherein said adapter is a silicon adapter.
3. The integrated circuit package according to claim 1 , wherein said encapsulant is a glob-top material.
4. The integrated circuit package according to claim 1 , wherein said substrate further has at least one conductive via extending therethrough for conducting heat away from said semiconductor die.
5. The integrated circuit package according to claim 1 , wherein said heat spreader comprises four sidewalls, each of said sidewalls being in contact with said substrate.
6. The integrated circuit package according to claim 5 , wherein each of said sidewalls is fixed to said substrate.
7. The integrated circuit package according to claim 5 , wherein each of said sidewalls contacts said substrate at more than one location.
8. The integrated circuit package according to claim 6 wherein said sidewalls extend and project from said second surface of said substrate.
9. A process for manufacturing an integrated circuit comprising: mounting a semiconductor die to a first surface of a substrate; wire bonding said semiconductor die to ones of conductive traces of said substrate; mounting an adapter on a portion of said semiconductor die; encapsulating the wire bonds and a remainder of said semiconductor die in an encapsulant; mounting a heat spreader on said adapter and said substrate such that a top portion of said heat spreader contacts said adapter and at least one sidewall which extends from said top portion and contacts said substrate; and forming a ball grid array on a second surface of said substrate, bumps of said ball grid array being electrically connected to said conductive traces.
10. The process according to claim 9 , wherein said mounting said adapter comprises mounting a silicon adapter to said portion of said semiconductor die.
11. The process according to claim 9 , wherein said encapsulating the wire bonds comprises depositing a liquid dam material on a top surface of said substrate and encapsulating said wire bonds in a glob-top material.
12. The process according to claim 9 , wherein said mounting a heat spreader comprises fixing a top portion of said heat spreader to said silicon adapter and fixing said at least one sidewall to the substrate.
13. The process according to claim 9 , wherein said mounting a heat spreader comprises fixing a top portion of said heat spreader to said silicon adapter and fixing four sidewalls which extend from said top portion, to said substrate.
14. The process according to claim 13 , wherein fixing said four sidewalls to said substrate comprises fixing each of said four sidewalks to more than one location of said substrate.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
December 19, 2002
May 18, 2004
Browse 5M+ US patents with plain-English claim translations and AI-generated analysis.