Semiconductor device and manufacturing method thereof

1. A method of manufacturing a semiconductor package comprising the steps of: (a) providing a semiconductor device including a semiconductor chip and a substrate, wherein said semiconductor chip has a principal surface and a back surface, opposite to said principal surface, and includes an integrated circuit and a plurality of external terminals formed on said principal surface, and wherein said substrate has a plurality of lead portions formed on one surface of said substrate, a device hole and a plurality of through hole wirings formed at both sides of said device hole, said plurality of through hole wirings are extended from said one surface to the other surface of said substrate and are electrically connected to said plurality of lead portions, (b) reducing a thickness of said semiconductor chip by spin-etching of said back surface to effect a thinning of said semiconductor chip to a thickness less than that of said substrate; (c) disposing said thinned semiconductor chip in said device hole of said substrate; (d) electrically connecting first ends of said plurality of lead portions with said plurality of external terminals of said semiconductor chip, respectively; (e) sealing said thinned semiconductor chip by a resin member such that said device hole of said substrate is filled with said resin member and said semiconductor chip is sealed with said resin member; and (f) forming a plurality of bump electrodes on said one surface of said substrate at said plurality of through hole wirings, said plurality of bump electrodes being electrically connected to said plurality of lead portions, respectively, and providing a connection with a printed circuit board.

2. A method of manufacturing a semiconductor package according to claim 1 , wherein said plurality of through hole wirings at said other surface of said base substrate provides a connection with another device to be stacked on said semiconductor package.

3. A method of manufacturing a semiconductor package according to claim 2 , wherein said substrate includes a flexible base tape.

4. A method of manufacturing a semiconductor package comprising the steps of: (i) providing a first semiconductor package and a second semiconductor package, each of said first and second semiconductor packages having the same function and being respectively provided by the sub-steps of: (a) providing a semiconductor chip and a substrate, wherein said semiconductor chip has a principal surface and a back surface, opposite to said principal surface, and includes an integrated circuit and a plurality of external terminals formed on said principal surface, and wherein said substrate has a plurality of lead portions formed on one surface of said substrate, a device hole and a plurality of through hole wirings formed at both sides of said device hole, said plurality of through hole wirings are extended from said one surface to the other surface of said substrate and are electrically connected to said plurality of lead portions; (b) reducing a thickness of said semiconductor chip by spin-etching of said back surface to effect a thinning of said semiconductor chip to a thickness less than that of said substrate; (c) disposing said thinned semiconductor chip in said device hole of said substrate; (d) electrically connecting first ends of said plurality of lead portions with said plurality of external terminals of said semiconductor chip, respectively; (e) sealing said thinned semiconductor chip by a resin member such that said device hole of said substrate is filled with said resin member and said semiconductor chip is sealed with said resin member; and (f) forming a plurality of bump electrodes on said one surface of said substrate at said plurality of through hole wirings, said plurality of bump electrodes being electrically connected to said plurality of lead portions, respectively; and (ii) stacking said second semiconductor package on said first semiconductor package such that said plurality of bump electrodes of said second semiconductor package are electrically connected with said plurality of through hole wirings at said other surface of said substrate of said first semiconductor package, respectively, said plurality of bump electrodes of said first semiconductor package providing a connection with a printed circuit board.

5. A method of manufacturing a semiconductor package according to claim 4 , wherein said plurality of through hole wirings at said other surface of said base substrate of said second semiconductor package provides a connection with the other device to be stacked on said second semiconductor package.

6. A method of manufacturing a semiconductor package according to claim 5 , wherein said substrate of each of said first and second semiconductor packages includes a flexible base tape.

7. A method of manufacturing a semiconductor package according to claim 4 , wherein said semiconductor chip of each of said first and second semiconductor packages includes a memory circuit, and wherein said plurality of external terminals of said semiconductor chip of each of said first and second semiconductor packages includes common signal terminals electrically connected to one another, and an independent signal terminal electrically isolated to each other.

8. A method of manufacturing a semiconductor package according to claim 7 , wherein said substrate of each of said first and second semiconductor packages includes a flexible base tape.