Patentable/Patents/US-6763108
US-6763108

Apparatus and method for line pair testing and fault diagnostics

PublishedJuly 13, 2004
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

A line pair testing and fault diagnostic apparatus implementing three-terminal measurement techniques using a multiple frequency source waveform transmission to propagate a reflected waveform. The apparatus implements a microcomputer circuit executing a program. The program has frequency domain analysis algorithms to process the reflected waveform to provide a craftsperson with the electrical characteristic data of a line pair to inform the craftsperson the existence of a line pair fault and the location of the fault in the line pair. The apparatus implements relays for switching between several diagnostics circuits within the apparatus for providing the craftsperson with numerous methods and techniques for troubleshooting a line pair.

Patent Claims
7 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A telephone line pair interface circuit comprising: at least two connection terminals; a plurality of multiple contact switching relays, each of said relays having a first and a second contact connection condition and at least one activating element controllable by a microcomputer having electronic memory means for changing said relay between said first and said second contact connection conditions; a capacitor; means incorporating said capacitor for snubbing inductive residuals from the line pair; means incorporating said capacitor for monitoring an electrical signal flow on telephone line pair before disrupting the signal flow; means incorporating said capacitor for detecting a telephone ring signal; and means for simulating a large inductance to carry loop current from the line pair once a communication connection is established on the opposite end of the telephone line pair, wherein said connection terminals, said snubbing means, said monitoring means, said ring signal detecting means and said simulated inductance means are so arranged constructed and interconnected as to selectably provide a predetermined selection of any of said means electrically connected to said connection terminals in dependence upon the contact connection conditions of said plurality of relays.

2

2. A telephone line pair interface circuit as defined in claim 1 wherein said capacitor is a 250-volt polypropylene capacitor.

3

3. A telephone line pair interface circuit as defined in claim 1 wherein the predetermined selection further comprises selectably bypassing said snubbing means with said plurality of multiple contact switching relays.

4

4. A telephone line pair interface circuit as defined in claim 1 wherein said detecting means further comprise: a transformer having a primary winding with a first and a second terminal and a secondary winding with a first and a second terminal; a resistor electrically connected in series between the first terminal of the primary winding terminal of said transformer and said capacitor; a means for indicating the presence of a ring signal having a predetermined voltage electrically connected to a second terminal of the primary winding terminal of said transformer, said indicating means energizing when the ring signal is present and placing a voltage on the first terminal of the secondary winding; and detecting means electrically connected to the first terminal of the secondary winding responsive to the voltage placed on the first terminal of the secondary winding to announce the presence of a ring signal.

5

5. A telephone line pair interface circuit as defined in claim 1 wherein said indicating means comprise: an optoisolator having a transistor portion and a diode portion, said transistor portion having a collector terminal electrically connected to a biasing low voltage source and an emitter terminal electrically connected to said detecting means; and a threshold voltage circuit comprising a first and a second zener diode, each said zener diode having a cathode terminal and an anode terminal, the cathode terminal of the first zener diode is electrically connected to the first connection terminal and the anode terminal of the first zener diode is electrically connected to the anode terminal of the second zener diode, the cathode terminal of the second zener diode is electrically connected through a resistor to a cathode terminal of the diode portion of said optoisolator, an anode terminal of the diode portion of the optoisolator is electrically connected to the first terminal of the primary winding of said transformer.

6

6. A telephone line pair interface circuit as defined in claim 1 wherein said inductor simulating means comprises: a rectifier bridge having two input terminals and two output terminals; a first balancing resistor; a second balancing resistor; a darlington transistor having a base terminal, a collector terminal and an emitter terminal, the base terminal connected through both said first balancing resistor to the first output terminal of said rectifier bridge and said second balancing resistor to the second output terminal of said rectifier bridge, and the emitter terminal of said darlington transistor is electrically connected through a current limiting resistor to the first terminal of said rectifier bridge, and the collector terminal is electrically connected through an over-voltage protection means to the emitter terminal of said darlington transistor, and the collector terminal of said darlington transistor is electrically connected through a heat dissipation resistor to the second output terminal of said rectifier bridge; and a capacitor electrically connected with the base terminal of said darlington transistor and shunted with said first balancing resistor to provide a biasing voltage across the emitter terminal and the base terminal of said darlington transistor.

7

7. A telephone line pair interface circuit as defined in claim 3 wherein said snubbing means further comprises: a series resistor having a first terminal electrically connected to said capacitor and a second terminal electrically connected to the second terminal of the primary winding of said transformer.

Classification Codes (CPC)

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Patent Metadata

Filing Date

November 6, 2000

Publication Date

July 13, 2004

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Cite as: Patentable. “Apparatus and method for line pair testing and fault diagnostics” (US-6763108). https://patentable.app/patents/US-6763108

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