This invention concerns a process for producing oxide thin film on a substrate by an ALD type process. According to the process, alternating vapour-phase pulses of at least one metal source material, and at least one oxygen source material are fed into a reaction space and contacted with the substrate. According to the invention, an yttrium source material and a zirconium source material are alternately used as the metal source material so as to form an yttrium-stabilised zirconium oxide (YSZ) thin film on a substrate.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method for producing an integrated circuit comprising: forming a zirconium stabilized yttrium oxide thin film over a substrate comprising a partially fabricated integrated circuit by an atomic layer deposition (ALD)-type process comprising alternately feeding into said reaction space vapor phase pulses of a first yttrium source material, a second zirconium source material, and at least one oxygen source material capable of forming an oxide with the first yttrium source material and the second zirconium source material.
2. The method of claim 1 , wherein the thin film is a capacitor dielectric.
3. The method of claim 1 , wherein the thin film is a gate oxide layer.
4. A method of forming a capacitor for a random access memory (RAM) device by an atomic layer deposition (ALD)-type process, said method comprising: providing a reaction chamber in an ALD reactor with a substrate comprising a partially fabricated capacitor; and forming a zirconium stabilized yttrium oxide thin film over the substrate by a process comprising: alternatively feeding into said reaction space vapor phase pulses of a first metal source material, a second metal source material and at least one oxygen source material capable of forming an oxide with the first metal source material and the second metal source material, wherein said first metal source material is a yttrium source material and said second metal source material is a zirconium source material.
5. The method of claim 4 , wherein the yttrium source material is Y(thd) 3 , and the zirconium source material is dicyclopentadienyl zirconium dichloride (Cp 2 ZrCl 2 ), and the oxygen source material is selected from the group consisting of O 3 and a mixture of O 2 and O 3 .
6. The method of claim 4 , wherein the random access memory device is a dynamic random access memory (DRAM) device.
7. A method of forming a gate oxide for a transistor comprising: providing a reaction chamber of an atomic layer deposition (ALD) reactor with a substrate comprising a partially fabricated integrated circuit; and forming a zirconium stabilized yttrium oxide thin film over the substrate by an ALD-type process comprising: alternately feeding into the reaction space an yttrium source material, a zirconium source material and an oxygen source material, wherein the oxygen source material is capable of forming an oxide with the yttrium source material and the zirconium source material.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
April 8, 2003
August 17, 2004
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