Patentable/Patents/US-6806933
US-6806933

Array substrate with multi-layer electrode line

PublishedOctober 19, 2004
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

The present invention discloses a method of manufacturing an array substrate, comprising: forming an electrode line on a substrate using a wet etching technique; and forming an organic insulating layer on an exposed surface of the substrate while covering the electrode line, wherein the electrode line has a side portion having an overhang or a taper angle of more than 45° C. Due to the method, the ashing process using a dry etchant gas cannot be needed anymore.

Patent Claims
12 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A method of manufacturing an array substrate, comprising: forming an electrode line on a substrate using a wet etching technique; and forming an organic insulating layer on an exposed surface of the substrate while covering the electrode line, wherein the electrode line has a side portion having an overhang or a taper angle of more than 45 from a top surface of the electrode line.

2

2. The method of claim 1 , wherein the organic insulating layer is made of one of benzocyclobutene, an olefin-based insulating material, an acrylic-based insulating material, and a silicon-based insulating material.

3

3. The method of claim 1 , wherein the electrode line has first and second metal layers of a dual-layered structure, and a side portion of the first metal layer is more etched than a side portion of the second metal layer.

4

4. The method of claim 3 , wherein the first metal layer is made of one of aluminum, an aluminum alloy, AlNd, copper or a copper alloy.

5

5. The method of claim 3 , wherein the second metal layer is made of one of Cr, Cr-alloy, Mo, Mo-alloy, Ta, Ta-alloy, W, or W-alloy.

6

6. The method of claim 1 , wherein the electrode line has first, second and third metal layers of a three-layered structure, and a side portion of the second metal layer is less etched than that of the first and third metal layers.

7

7. An array substrate for a liquid crystal display device, comprising: an electrode line formed on a substrate; and an organic insulating layer formed on an exposed surface of the substrate while covering the electrode line, wherein the electrode line has an overhang or a taper angle of a side portion of the electrode line is more than 45 from a top surface of the electrode line.

8

8. The array substrate of claim 7 , wherein the organic insulating layer is made of one of benzocyclobutene, an olefin-based insulating material, an acrylic-based insulating material, and a silicon-based insulating material.

9

9. The array substrate of claim 7 , wherein the electrode line has first and second metal layers of a dual-layered structure, and a side portion of the first metal layer is more etched than that of the second metal layer.

10

10. The array substrate of claim 9 , wherein the first metal layer is made of one of aluminum, an aluminum alloy, AlNd, copper or a copper alloy.

11

11. The array substrate of claim 9 , wherein the second metal layer is made of one of Cr, Cr-alloy, Mo, Mo-alloy, Ta, Ta-alloy, W, or W-alloy.

12

12. The array substrate of claim 7 , wherein the electrode line has first, second and third metal layers of a three-layered structure, and a side portion of the second metal layer protrudes beyond side portions of the first and third metal layers.

Classification Codes (CPC)

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Patent Metadata

Filing Date

December 22, 2000

Publication Date

October 19, 2004

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Cite as: Patentable. “Array substrate with multi-layer electrode line” (US-6806933). https://patentable.app/patents/US-6806933

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