A method for dynamically regulating the power consumption of a high-speed integrated circuit which includes a multiplicity of processing blocks. A first metric and a second metric, which are respectively related to a first performance parameter and a second performance parameter of the integrated circuit, are defined. The first metric is set at a pre-defined value. Selected blocks of the multiplicity of processing blocks are disabled in accordance with a set of pre-determined patterns. The second metric is evaluated, while the disabling operation is being performed, to generate a range of values of the second metric. Each of the values corresponds to the pre-defined value of the first metric. A most desirable value of the second metric is determined from the range of values and is matched to a corresponding pre-determined pattern. The integrated circuit is subsequently operated with selected processing blocks disabled in accordance with the matching pre-determined pattern.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method for dynamically regulating power consumption of a communication system including a filter that receives coefficients from an adaptation circuit, the method comprising: specifying a specified error; computing an information error metric; and controlling deactivation of at least a portion of the filter, the at least the portion of the filter receiving coefficients from the adaptation circuit, according to a criterion, the criterion being based on at least one of the information error metric and the specified error to regulate at least one of the information error metric and a power metric; wherein the information error metric comprises a sum of squares of the coefficients received by the at least the portion of the filter.
2. The method of claim 1 wherein the criterion is the following: deactivate if the information error metric is strictly smaller than the specified error.
3. The method of claim 1 wherein the criterion is the following: deactivate if the information error metric is smaller than a target value, the target value being smaller than the specified error.
4. The method of claim 1 wherein the communication system comprises a gigabit transceiver, the gigabit transceiver including a set of constituent transceivers.
5. The method of claim 4 wherein the filter comprises a set of taps, each of the taps receiving a filter coefficient.
6. The method of claim 1 , wherein controlling deactivation further comprises: deactivating at least the portion of the filter by bypassing at least the portion of the filter.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
September 7, 2001
October 19, 2004
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