A method for fabricating semiconductor die packages including a mounting substrate and dice attached thereto. The mounting substrate includes multiple die attach sites and a designator having substrate identification information. The die attach sites are evaluated and categorized as either good or defective die attach sites, wherein the evaluated information is saved in an electronic file as mapped information. A die is attached to the die attach sites in accord with the information, wherein known good dice are attached to the good die attach sites and known defective dice are attached to the defective die attach sites. The assembly is then encapsulated in a transfer molding operation.
Legal claims defining the scope of protection, as filed with the USPTO.
1. An assembly method for attaching a semiconductor die and a substrate having a plurality of die attach sites on a surface thereof comprising: mapping said plurality of die attach sites on said mounting substrate; determining good die attach sites; determining defective die attach sites on said substrate; storing information for good die attach sites and defective die attach sites of said mounting substrate in an electronic file for access therefrom; accessing said information for at least one good die attach site on said substrate; accessing said information for at least one defective die attach site on said substrate; attaching at least one semiconductor die to said mounting substrate using said information by one of attaching a known good die to a good die attach site of said good die attach sites; and attaching a known defective die to a defective die attach site of said defective die attach sites.
2. The method of claim 1 , wherein said mapping comprises testing at least one die attach site of said plurality of die attach sites on said mounting substrate.
3. The method of claim 1 , further comprising providing a designator having substrate identification information on a peripheral portion of said mounting substrate.
4. The method of claim 3 , further comprising providing a reading unit for reading said designator to access said mapped information in said electronic file with respect to said mounting substrate corresponding to said substrate identification information.
5. A method for fabricating semiconductor packages, each package having a mounting substrate having a plurality of die attach sites on at least one surface thereof, the method comprising: evaluating said plurality of die attach sites on said mounting substrate for determining information regarding said die attach site; determining good die attach sites; determining defective die attach sites from said information; attaching at least one semiconductor die to said mounting substrate according to said information by one of attaching a known good die to a good die attach site of said good die attach sites and attaching a known defective die to a defective die attach site of said defective die attach sites; and encapsulating said mounting substrate using an encapsulation material for encapsulating at least one known good die and at least one known defective die on said mounting substrate.
6. The method of claim 5 , wherein said evaluating comprises testing each of said plurality of die attach sites on said mounting substrate.
7. The method of claim 5 , further comprising providing said mapped information to an electronic file.
8. The method of claim 7 , further comprising providing a designator having substrate identification information on a peripheral portion of said mounting substrate.
9. The method of claim 8 , further comprising reading said designator with a reading unit to access said mapped information in said electronic file with respect to said mounting substrate corresponding to said substrate identification information.
10. The method of claim 5 , further comprising segregating said at least one semiconductor die attached to said mounting substrate into a semiconductor die package.
11. The method of claim 10 , wherein said segregating comprises separating from said semiconductor package at least one semiconductor die package having one of said known good die attached to said good die attach site and said known defective die attached to said defective die attach site according to said mapped information.
12. The method of claim 5 , wherein said encapsulating comprises transfer molding said mounting substrate.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
April 25, 2003
October 26, 2004
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