Patentable/Patents/US-6818527
US-6818527

Method of manufacturing semiconductor device with shallow trench isolation

PublishedNovember 16, 2004
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

In a method of manufacturing a semiconductor device, a semiconductor substrate having device regions and an isolation region for separating the device region is provided. Then, a trench is formed in the isolation region of the semiconductor substrate. A nitride film is formed on the device regions of the semiconductor substrate. Next, an oxide film is formed within the trench and on the nitride film so that an upper surface of the oxide film within the trench is located more than about 500 å below an upper surface of the nitride film. Finally, the oxide film is polished by CMP method so that a height of the upper surface of the oxide film within the trench portion is maintained at less than a height of the upper surface of the nitride film adjacent thereto.

Patent Claims
19 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A method of manufacturing a semiconductor device comprising: providing a semiconductor substrate having a plurality of device regions and an isolation region for separating the device regions; forming a trench in the isolation region of the semiconductor substrate; forming a nitride film on the device regions of the semiconductor substrate; forming an oxide film within the trench and on the nitride film so that an upper surface of the oxide film within the trench is located more than about 500 below an upper surface of the nitride film; and polishing the oxide film by a CMP method so that a height of the upper surface of the oxide film within the trench is maintained at less than a height of the upper surface of the nitride film adjacent thereto, wherein said polishing reduces the height of the upper surface of the oxide film within the trench.

2

2. The method according to claim 1 , wherein the oxide film formed on the nitride film is completely removed by the polishing.

3

3. The method according to claim 1 , wherein a part of the nitride film is removed by the polishing.

4

4. The method according to claim 1 , wherein the depth of the trench ranges from about 2000 to about 4000 .

5

5. The method according to claim 1 , further comprising removing the nitride film after polishing.

6

6. A method of manufacturing a semiconductor device comprising: providing a semiconductor substrate having a plurality of device regions and an isolation region for separating the device regions; forming a nitride film on an entire surface of the semiconductor substrate; removing a part of the nitride film and a part of the semiconductor substrate within the isolation region so that a trench is formed in the isolation region of the semiconductor substrate, and the nitride film remains on the device regions of the semiconductor substrate; forming an oxide film within the trench and on the nitride film so that an upper surface of the oxide film within the trench is located more than about 500 below an upper surface of the remaining nitride film; and polishing the oxide film by a CMP method so that a height of the upper surface of the oxide film within the trench is maintained at less than a height of the upper surface of the nitride film adjacent thereto, wherein said polishing reduces the height of the upper surface of the oxide film within the trench.

7

7. The method according to claim 6 , wherein the oxide film formed on the nitride film is completely removed by the polishing.

8

8. The method according to claim 6 , wherein a part of the nitride film is removed by the polishing.

9

9. The method according to claim 6 , wherein the depth of the trench ranges from about 2000 to about 4000 .

10

10. The method according to claim 6 , further comprising removing the nitride film after polishing.

11

11. The method according to claim 6 , wherein the removing is performed using a photomask as a mask.

12

12. A method of manufacturing a semiconductor device comprising: providing a semiconductor substrate having a plurality of device regions and an isolation region for separating the device regions; forming a trench having a depth D1 in the isolation region of the semiconductor substrate; forming a nitride film having a thickness T1 on the device regions of the semiconductor substrate; forming an oxide film having a thickness T2 within the trench and on the nitride film so that an upper surface of the oxide film within the trench is located more than about 500 below an upper surface of the nitride film; polishing a part of the oxide film having a thickness T3 by a CMP method so that a height of the upper surface of the oxide film within the trench is maintained at less than a height of the upper surface of the nitride film adjacent thereto, wherein said polishing reduces the height of the upper surface of the oxide film within the trench; and further removing another part of the oxide film having a thickness of T4.

13

13. The method according to claim 12 , wherein the oxide film formed on the nitride film is completely removed by the polishing.

14

14. The method according to claim 12 , wherein a part of the nitride film is removed by the polishing.

15

15. The method according to claim 12 , wherein the depth D1 of the trench ranges from about 2000 to about 4000 .

16

16. The method according to claim 12 , further comprising removing the nitride film after polishing.

17

17. The method according to claim 12 , wherein the thickness T2 is calculated as follows: T 2 D 1 T 3 T 4.

18

18. The method according to claim 12 , wherein the thickness T1 is calculated as follows: T 1 T 2 500 D 1.

19

19. The method according to claim 12 , wherein the thickness T1 is equal to or less than 5000 A.

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Patent Metadata

Filing Date

November 26, 2002

Publication Date

November 16, 2004

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