Voltage overshoot reduction circuits

1. A method of reducing output voltage overshoot at an output of an integrated circuit, said method comprising: setting a reference voltage to a first voltage value; producing a first voltage having a second voltage value after setting said reference voltage and in response to an output voltage at said output being below a threshold, said second value higher than said first value; decreasing said reference voltage to a third voltage value in response to said first voltage being at said second value and before said output voltage reaches said threshold; decreasing said first voltage to a fourth value in response to said reference voltage decreasing to said third value and before said output voltage reaches said threshold, said fourth value greater than said third value; increasing said reference voltage to said first value in response to said output voltage reaching said threshold; and generating a control signal to prevent said output voltage from rising further in response to said reference voltage increasing to said fourth value.

2. The method of claim 1 wherein said producing comprises triggering an operational amplifier to output a first voltage having a second voltage value after setting said reference voltage and in response to an output voltage at said output being below a threshold, said second value higher than said first value.

3. The method of claim 1 wherein said decreasing said reference voltage comprises decreasing said reference voltage to a third voltage value by turning on at least one transistor in response to said first voltage being at said second value and before said output voltage reaches said threshold.

4. The method of claim 1 wherein said increasing comprises increasing said reference voltage to said first value by turning off a transistor in response to said output voltage reaching said threshold.

5. A method of reducing output voltage overshoot in an integrated circuit, said method comprising: varying a first voltage from a first voltage value to a lower second voltage value and then back to said first value, said varying from said first value to said second value occurring while an output voltage is below a threshold and said varying back to said first value occurring in response to said output voltage reaching said threshold; varying a second voltage from a third voltage value to a fourth voltage value in response to said first voltage varying from said first value to said second value and to said output voltage being below said threshold, said third value higher than said first value and said fourth value higher than said second value but lower, than said first value; and generating a signal to reduce output voltage overshoot in response to said first voltage returning back to said first value.

6. The method of claim 5 wherein said varying a first voltage comprises varying a first voltage to a non-inverting input of an operational amplifier from a first voltage value to a lower second voltage value and then back to said first value, said varying from said first value to said second value occurring while an output voltage is below a threshold and said varying back to said first value occurring in response to said output voltage reaching said threshold.

7. The method of claim 5 wherein said varying a second voltage comprises varying a second voltage at an inverting input of an operational amplifier from a third voltage value to a fourth voltage value in response to said first voltage varying from said first value to said second value and to said output voltage being below said threshold, said third value higher than said first value and said fourth value higher than said second value but lower than said first value.

8. The method of claim 5 wherein said generating comprises outputting a signal at an output of an operational amplifier to reduce output voltage overshoot in response to said first voltage at a non-inverting input of said amplifier returning back to said first value, said second voltage being at an inverting input of said amplifier.

9. A method of reducing output voltage overshoot in an integrated circuit, said method comprising: inputting a first voltage to a non-inverting input of an integrated circuit amplifier before an output voltage reaches a threshold; inputting a second voltage, higher than said first, to an inverting input of said integrated circuit amplifier before said output voltage reaches said threshold; inputting a third voltage, lower than said first voltage, to said non-inverting input before said output voltage reaches said threshold; inputting a fourth voltage to said inverting input before said output voltage reaches said threshold, said fourth voltage lower than said second voltage and higher than said third voltage; and inputting said first voltage to said non-inverting input in response to said output voltage reaching said threshold; wherein: said amplifier outputs a signal in response to inputting both said fourth and first voltages, said signal causing said output voltage to stop rising.

10. The method of claim 9 further comprising producing said first and third voltages with a hysteresis circuit.

11. The method of claim 9 further comprising producing said second and fourth voltages at the output of a second operational amplifier coupled to a hysteresis circuit.

12. A feedback control circuit operative to generate a signal in response to a voltage reaching a threshold level, said circuit comprising: a first amplifier having an output, an inverting input, and a non-inverting input, said non-inverting input coupled to a reference voltage having a constant voltage value, said inverting input operative to receive said voltage; a second amplifier having an output, an inverting input, and a non-inverting input, said second amplifier inverting input coupled to said first amplifier output, said second amplifier output operative to providing said generated signal; and a hysteresis circuit coupled to said first amplifier output and to said second amplifier non-inverting input.

13. The feedback control circuit of claim 12 wherein said hysteresis circuit comprises: a PNP transistor having a collector, a base, and an emitter, said emitter coupled to said first amplifier output; a first resistor having first and second terminals, said first terminal coupled to said PNP transistor collector; a second resistor having first and second terminals, said first terminal operative to be coupled to a DC voltage, said second terminal coupled to said second amplifier non-inverting input; a DC voltage source having a positive terminal and a negative terminal, said positive terminal coupled to said second amplifier non-inverting input, said negative terminal coupled to said PNP transistor base; a third resistor having first and second terminals, said first terminal coupled to said negative terminal; and an NPN transistor having an emitter, a collector coupled to said second terminal of said third resistor, and a base coupled to said PNP transistor emitter.

14. The feedback control circuit of claim 13 wherein said DC voltage source is 0.5 volts.

15. The feedback control circuit of claim 13 wherein said DC voltage is 1.5 volts.

16. The feedback control circuit of claim 12 wherein said first amplifier comprises: an operational amplifier having said first amplifier output, said first amplifier non-inverting input and said first amplifier inverting input; a capacitor; and a resistor; wherein: said capacitor and said resistor are coupled in series between said first amplifier output and said first amplifier inverting input.

17. The feedback control circuit of claim 12 wherein said second amplifier comprises: an operational amplifier having said second amplifier output, said second amplifier non-inverting input and said second amplifier inverting input; and a resistor; wherein: said resistor is coupled in series between said second amplifier output and said second amplifier inverting input.

18. A closed-loop DC power supply comprising: a switching control circuit having a duty cycle that determines the amount of current provided to an output of said power supply; a transformer having input coupled to said switching control circuit and an output operative to provide a low AC voltage having high frequency; rectifier and filtering circuitry having an input coupled to said transformer output and having an output operative to provide a regulated DC voltage to said power supply output; an opto-coupler having an input and an output, said output coupled to said switching control circuit; and a feedback control circuit having an input coupled to said power supply output and having an output coupled to said opto-coupler, said feedback circuitry comprising first and second operational amplifiers and a hysteresis circuit coupled to an output of said first operational amplifier and to a non-inverting input of said second operational amplifier, said first operational amplifier having an inverting input coupled to said power supply output, said second operational amplifier having an output coupled to said feedback circuitry output.

19. The DC power supply of claim 18 wherein said hysteresis circuit comprises: a PNP transistor having a collector, a base, and an emitter, said emitter coupled to said first amplifier output; a first resistor having first and second terminals, said first terminal coupled to said PNP transistor collector; a second resistor having first and second terminals, said first terminal operative to be coupled to a DC voltage, said second terminal coupled to said second amplifier non-inverting input; a DC voltage source having a positive terminal and a negative terminal, said positive terminal coupled to said second amplifier non-inverting input, said negative terminal coupled to said PNP transistor base; a third resistor having first and second terminals, said first terminal coupled to said negative terminal; and an NPN transistor having an emitter, a collector coupled to said second terminal of said third resistor, and a base coupled to said PNP transistor emitter.

20. Apparatus for reducing output voltage overshoot at an output of an integrated circuit, said apparatus comprising: means for setting a reference voltage to a first voltage value; means for producing a first voltage having a second voltage value after setting said reference voltage and in response to an output voltage at said output being below a threshold, said second value higher than said first value; means for decreasing said reference voltage to a third voltage value in response to said first voltage being at said second value and before said output voltage reaches said threshold; means for decreasing said first voltage to a fourth value in response to said reference voltage decreasing to said third value and before said output voltage reaches said threshold, said fourth value greater than said third value; means for increasing said reference voltage to said first value in response to said output voltage reaching said threshold; and means for generating a control signal to prevent said output voltage from rising further in response to said reference voltage increasing to said fourth value.

21. Apparatus for reducing output voltage overshoot in an integrated circuit, said apparatus comprising: means for varying a first voltage from a first voltage value to a lower second voltage value and then back to said first value, said varying from said first value to said second value occurring while an output voltage is below a threshold and said varying back to said first value occurring in response to said output voltage reaching said threshold; means for varying a second voltage from a third voltage value to a fourth-voltage value in response to said first voltage varying from said first value to said second value and to said output voltage being below said threshold, said third value higher than said first value and said fourth value higher than said second value but lower than said first value; and means for generating a signal to reduce output voltage overshoot in response to said first voltage returning back to said first value.