A circuit to detect pin layer reversal including an input circuit to receive an input signal having a first portion to indicate a pin layer reversal and having a second portion to indicate a servo sync mark, a first servo sync mark detector for detecting a positive servo sync mark from the input signal, a second servo sync mark detector for detecting a negative servo sync mark from the input signal, and a circuit responsive to the positive servo sync mark and the negative servo sync mark to generate a signal to indicate if the servo sync mark has been reversed and to generate a signal to indicate the pin layer reversal.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A circuit to detect pin layer reversal, comprising: an input circuit to receive an input signal having a first portion to indicate a pin layer reversal and having a second portion to indicate a servo sync mark; a first servo sync mark detector for detecting a positive servo sync mark from said input signal; a second servo sync mark detector for detecting a negative servo sync mark from said input signal; and a circuit responsive to said positive servo sync mark and said negative servo sync mark to generate a signal to indicate if said servo sync mark has been reversed and to generate a signal to indicate said pin layer reversal.
2. A circuit to detect pin layer reversal, as in claim 1 , wherein said circuit responsive to said positive and negative servo sync mark includes an exclusive OR circuit.
3. A circuit to detect pin layer reversal, as in claim 1 , wherein said circuit responsive to said positive and negative servo sync mark includes an AND circuit.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
October 29, 2001
June 21, 2005
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