One object of the present invention is to suppress a threshold voltage of at least an n-channel MISFET using a nitride of a high melting point metal at it's gate electrode. In order to achieve the object, a gate electrode 109 of a p-channel MISFET is constituted of a titanium nitride film 106 and a tungsten film 107 formed on the film 106 and a gate electrode 110a of an n-channel MISFET is constituted of a titanium nitride film 106a and a tungsten film 107 formed on the film 106a. The titanium nitride film 106a is formed by nitrogen ion implantation in the titanium nitride film 106 to decrease the work function.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method of manufacturing a semiconductor device having a complementary insulated gate field effect transistor: said complementary insulated gate field effect transistor comprising a first insulated gate field effect transistor of one conductivity-type having a first gate electrode and a second insulated gate field effect transistor of an opposite conductivity-type having a second gate electrode; each of said first and second electrodes including a nitride layer of a high melting point metal as at least at a part of said gate electrode; said method comprising the steps of: forming said nitride layer of said high melting point metal at said first gate electrode and said second electrode simultaneously; and introducing thereafter nitrogen into said nitride layer of said high melting point metal only in said first gate electrode between said first and second gate electrodes to enhance the nitrogen density in said nitride layer only in said first gate electrode.
2. A method of manufacturing a semiconductor device having a complementary insulated gate field effect transistor as set force in claim 1 , wherein said high melting point metal comprises an element selected from the group consisting of titanium, tungsten and tantalum.
3. A method of manufacturing a semiconductor device having a complementary insulated gate field effect transistor; said complementary insulated gate field effect transistor comprising a first insulated gate field effect transistor of one conductivity-type having a first gate electrode and a second insulated gate field effect transistor of an opposite conductivity-type having a second gate electrode; said method comprising steps of: forming a first nitride layer of a high melting point metal having a first nitrogen density as at least a part of said first gate electrode; and, forming a second nitride layer of said high melting point metal having a second nitrogen density different from said first nitrogen density as at least a part of said second gate electrode.
4. A method of manufacturing a semiconductor device having a complementary insulated gate field effect, transistor as set force in claim 3 , wherein said high melting point metal comprises an element selected from the group consisting of titanium, tungsten and tantalum.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
July 3, 2002
July 12, 2005
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