A plurality of intermediate layers are formed on a base layer. Each of the intermediate layers include a conductive pad which is formed on both the insulating film of the immediately preceding layer and an interlayer insulating film which is formed on both the conductive pad of the same intermediate layer and the insulating film of the preceding intermediate layer. A plurality of through holes are formed in each of the interlayer insulating films and are filled with conductive material. The conductive pad of each intermediate layer is in electrical contact with the conductive material in the through holes of the top most intermediate layer. An insulating film is formed on both this conductive pad and the insulating film of the top most intermediate layer. A hole is formed in this insulating film which hole is substantially the same size as the conductive pad. A bonding pad is formed on the conductive pad in the through hole.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method of manufacturing a semiconductor device, the method comprising the steps of: (a) forming an insulating film on a semiconductor substrate; (b) simultaneously forming a first conductive pad and a first wiring layer on the insulating film; (c) forming a first interlayer insulating film on the first conductive pad, the first wiring layer and the insulating film; (d) forming a plurality of first through holes in the first interlayer insulating film, each of the first through holes extending from the first conductive pad or the first wiring layer respectively, to an upper surface of the first interlayer insulating film; (e) filling the plurality of first though holes with conductive material; (f) simultaneously forming a second conductive pad and a second wiring layer on the first interlayer insulating film, each of the second conductive pad and the second wiring layer being in contact with the conductive material in one or more of the plurality of first through holes; (g) forming a second interlayer insulating film on the second conductive pad, the second wiring layer and the first interlayer insulating film; (h) forming a plurality of second through holes in the second interlayer insulating film, each of the second through holes extending from the second conductive pad or the second wiring layer, respectively, to an upper surface of the second interlayer insulating film; (i) filling the plurality of second through holes formed in the second interlayer insulating film with conductive material; (j) simultaneously forming a third conductive pad and a third wring layer on the second interlayer insulating film, each of the third conductive pad and wiring layer being in contact with the conductive material in one or more of the second through holes formed in the second interlayer insulating film; (k) forming a third interlayer insulating film on the third conductive pad, the third wiring layer and the second interlayer insulating film; (l-1) forming through the third interlayer insulating film, a third through hole above the third wiring layer and a through aperture above the third conductive pad which is substantially wider than said third through hole; (l-2) simultaneously filling said third through hole with a conductive material and leaving a conductive material covering a side wall of the through aperture so that part of the third conductive pad is exposed; and (m) simultaneously forming an uppermost wiring layer in contact with the conductive material in said third through hole and a bonding pad on the third conductive pad in the through aperture, in the third interlayer insulating film.
2. A method of manufacturing a semiconductor device according to claim 1 , further comprising: forming a passivation film on the third interlayer insulating film, the passivation film exposing the bonding pad.
3. A method of manufacturing a semi conductor device according to claim 2 , wherein the passivation film is formed by forming a silicon oxide film and a silicon nitride film.
4. A method of manufacturing a semiconductor device according to claim 1 , wherein the step (c) of forming the first interlayer insulating film comprises: forming a first silicon oxide film; coating hydrogen silsesquioxane resin to form a ceramic silicon oxide film; and forming a second silicon oxide film on the ceramic silicon oxide film by plasma CVD.
5. A method of manufacturing a semiconductor device according to claim 4 , further comprising a step of planarizing the second silicon oxide film by CMP.
6. A method of manufacturing a semiconductor device according to claim 4 , further comprising a step of planarizing the second silicon oxide film by etching.
7. A method of manufacturing a semiconductor device according to claim 1 , wherein the step (c) comprises of: forming Ti films covering inner surfaces of the through holes in the first interlayer insulating film of the base layer; forming TiN layers on the Ti films; and forming W layers on the TiN layers.
8. A method of manufacturing a semiconductor device according to claim 1 , wherein the step (c) comprises: forming Ti films covering inner surfaces of the through holes in the first interlayer insulating film by sputtering: forming TiN layers on the Ti films by sputtering; and forming W layers on the TiN layers.
9. A method of manufacturing a semiconductor device according to claim 1 , wherein the step (c) comprises: forming Ti films covering inner surfaces of the through holes in the first interlayer insulating film; forming TiN layers on the Ti films; and forming W layers on the TiN layers by plasma CVD.
10. A method of manufacturing a semiconductor device according to claim 1 , wherein the step (b) of forming the first conductive pad comprises: forming a Ti layer; forming an Al—Cu alloy layer; forming a Ti layer; and forming a TiN layer.
11. A method of manufacturing a semiconductor device according to claim 1 , wherein the conductive portion includes Ti, TiN and W layers.
12. A method of manufacturing a semiconductor device according to claim 1 , wherein the conductive portion formed in step (l-2) is formed to cover the entire side wall of the through hole.
13. A method of manufacturing a semiconductor device according to claim 1 , wherein the step (l-2) comprises forming a conductive layer on the third interlayer insulating film and etching the conductive layer to leave the conductive portion on the side wall of the through hole.
14. A method of manufacturing a semiconductor device according to claim 13 , wherein the step (l-1) also forms a third through hole through the third interlayer insulating film on the third wiring layer, and the step (l-2) forms a conductive filler in the third through hole.
15. A method of manufacturing a semiconductor device, the method comprising the steps of: (a) forming an insulating film on a semiconductor substrate; (b) forming a base layer over the insulating film by carrying out at least the following acts: (1) simultaneously forming a conductive pad and a wiring layer on the insulating film; (2) forming a base layer insulating film on the conductive pad, the wiring layer and the insulating film; (3) forming a plurality of base through holes in the base layer insulating film, each of the through base holes extending from the conductive pad or the wiring layer, respectively, to an upper surface of the base layer insulating film; (4) filling the base through holes with a conductive material; (c) forming first through nth intermediate layers over the base layer, n being a positive integer greater than 1, the first intermediate layer being formed on the base layer, the remaining intermediate layers being formed one on top of the other, each of the respective intermediate layers being formed by carrying out at least the following steps: (1) simultaneously forming a conductive pad and a wiring layer on the insulating film of the immediately preceding layer, each of the conductive pad and wiring layer being in contact with the conductive material in one or more of the through holes of the immediately preceding layer; (2) forming a respective interlayer insulating film on the conductive pad, the wiring layer and the insulating film of the immediately preceding layer; (3) forming a plurality of through holes in the interlayer insulating film of the respective intermediate layer, each of the through holes extending from the conductive pad or wiring layer, respectively, of the respective intermediate layer to an upper surface of the interlayer insulating film of the respective intermediate layer; (4) filling each of the through holes of the respective intermediate layer with a conductive material; and (d) forming an upper layer on the nth intermediate layer by carrying out at least the following steps: (1) simultaneously forming a conductive pad and a wiring layer on the interlayer insulating film of the nth intermediate layer, each of the conductive pad and wiring layer being in contact with the conductive material in one or more of the through holes in the insulating film of the nth intermediate layer; (2) forming an upper layer insulating film on both the conductive pad and the wiring layer of the upper layer and the insulating film of the nth intermediate layer; (3-a) forming, through the upper layer insulating film, an upper through bole above the wiring layer of the upper layer and a through aperture above the conductive pad of the upper layer, the through aperture being substantially wider than said upper through hole; (3-b) simultaneously filling said upper through hole with a conductive material and leaving a conductive material covering a side wall of the through aperture so that part of the conductive pad of the upper layer is exposed; and (4) simultaneously forming an uppermost wiring layer connected to the conductive material in said upper through hole, and a bonding pad on the conductive pad of the upper layer, the bonding pad being located in the upper through aperture in the upper layer insulating film.
16. A method of manufacturing a semiconductor device according to claim 15 , further comprising: (e) forming a passivation film on the upper layer insulating film, the passivation film exposing the bonding pad.
17. A method of manufacturing a semiconductor device according to claim 16 , wherein the passivation film is formed by forming a silicon oxide film and a silicon nitride film.
18. A method of manufacturing a semiconductor device according to claim 15 , wherein the step (b)(2) of forming the base layer insulating film comprises: forming a first silicon oxide film; coating hydrogen silsesquioxane resin on the silicon oxide film; thermally treating the hydrogen silsesquioxane to form a ceramic silicon oxide film; and forming a second silicon oxide film on the ceramic silicon oxide film by plasma CVD.
19. A method of manufacturing a semiconductor device according to claim 18 , further comprising a step of planarizing the second silicon oxide film by CMP.
20. A method of manufacturing a semiconductor device according to claim 18 , further comprising a step of planarizing the second silicon oxide film by etching.
21. A method of manufacturing a semiconductor device according to claim 15 , wherein the step (b)(4) comprises: forming Ti films covering an inner surface of the through holes in the base layer insulating film; forming TiN layers on the Ti films; and forming W layers on the TiN layers.
22. A method of manufacturing a semiconductor device according to claim 15 , wherein the step (b)(4) comprises: forming Ti films covering an inner surface of the through holes in the base layer insulating film by sputtering; forming TiN layers on the Ti films by sputtering; and forming W layers on the TiN layer.
23. A method of manufacturing a semiconductor device according to claim 15 , wherein the step (b)(4) comprises: forming Ti films covering an inner surface of the through holes in the base layer insulating film; forming TiN layers on the Ti films; and forming W layers on the TIN layer by blanket CVD.
24. A method of manufacturing a semiconductor device according to claim 15 , wherein the step (c)(1) of forming the conductive pad comprises: forming a Ti layer; forming an Al—Cu alloy layer; forming a Ti layer; and forming a TiN layer.
25. A method for manufacturing a semiconductor device according to claim 15 , wherein the conductive portion includes Ti, TiN and W layers.
26. A method of manufacturing a semiconductor device according to claim 15 , wherein the conductive portion formed in step (d)(3-b) is formed to cover the entire side wall of the through hole.
27. A method of manufacturing a semiconductor device according to claim 15 , wherein the step (d)(3-b) comprises forming a conductive layer on the third interlayer insulating film and etching the conductive layer to leave the conductive portion on the side wall of the through hole.
28. A method of manufacturing a semiconductor device according to claim 27 , wherein the step (d)(3-a) also forms a third through hole through the third interlayer insulating film on the third wiring layer, and the step (d)(3-b) forms a conductive filler in the third through hole.
29. A method of manufacturing a semiconductor device comprising the steps of: (a) forming a multi-level sub-structure on an underlying insulating layer which is formed over a semiconductor substrate by repeating the steps of; (1) forming a conductive layer; (2) patterning the conductive layer to leave a wiring region and a pad region; (3) forming an insulating layer over the patterned wiring and pad regions; (4) forming a wiring via hole through the insulating layer above the wiring region and a plurality of pad via holes through the insulating layer above the pad region; (5) embedding the via holes with conductive material to form a wiring via connected to the wiring region and a plurality of pad vias connected to the pad region; (b) forming an upper conductive layer on a surface of the multi-level sub-structure; (c) patterning the upper conductive layer to leave an upper wiring region and an upper pad region; (d) forming an upper insulating layer over the upper wiring region and the upper pad region; (e-1) forming, through the upper insulating layer, an upper wiring via hole above the upper wiring region and an opening above the upper pad region encompassing a region above said plurality of pad vias; (e-2) simultaneously filling said upper wiring via hole with a conductive material, and leaving a conductive material covering a side wall of the opening so that part of the upper pad region is exposed; and (f) simultaneously forming an uppermost wiring region connected to the conductive material in said upper wiring via hole and an uppermost pad region connected to said upper pad region, wherein the wiring regions and the pad regions are respectively vertically registered.
30. A method of manufacturing a semiconductor device according to claim 29 , wherein the conductive portion includes Ti, TIN and W layers.
31. A method of manufacturing a semiconductor device according to claim 29 , wherein the conductive portion formed in step (e-2) is formed to cover the entire side wail of the through hole.
32. A method of manufacturing a semiconductor device according to claim 29 , wherein the step (e-2) comprises forming a conductive layer on the third interlayer insulating film and etching the conductive layer to leave the conductive portion on the side wall of the through hole.
33. A method of manufacturing a semiconductor device according to claim 32 , wherein the step (e-1) also forms a third through hole through the third interlayer insulating film on the third wiring layer, and the step (e-2) forms a conductive filler in the third through hole.
34. A method of manufacturing a semiconductor device, the method comprising the steps of: (a) forming an insulating film on a semiconductor substrate; (b) forming a first conductive pad on the insulating film; (c) forming a first interlayer insulating film on both the first conductive pad and the insulating film; (d) forming a plurality of first through holes in the first interlayer insulating film extending from the first conductive pad to an upper surface of the first interlayer insulating film; (e) filling the plurality of first though holes with conductive material; (f) forming a second conductive pad on the first interlayer insulating film in contact with the conductive material in the plurality of first through holes; (g) forming a second interlayer insulating film on both the second conductive pad and the first interlayer insulating film; (h) forming a plurality of second through holes in the second interlayer insulating film extending from the second conductive pad to an upper surface of the second interlayer insulating film; (i) filling the plurality of second through holes formed in the second interlayer insulating film with conductive material; (j) forming a third conductive pad on the second interlayer insulating film and in contact with the conductive material in the second through holes formed in the second interlayer insulating film; (k) forming a third interlayer insulating film on both the third conductive pad and the second interlayer insulating film; (l) forming a through hole through the third interlayer insulating film which is substantially the same size as the third conductive pad; and (m) forming a bonding pad on the third conductive pad in the through hole in the third interlayer insulating film, wherein the step (c) of forming the first interlayer insulating film comprises: forming a first silicon oxide film; coating hydrogen silsesquioxane resin on the first silicon oxide film; thermally treating the hydrogen silsesquioxane resin to form a ceramic silicon oxide film; and forming a second silicon oxide film on the ceramic silicon oxide film by plasma GVD.
35. A method of manufacturing a semiconductor device according to claim 34 , further comprising a step of planarizing the second silicon oxide film by CMP.
36. A method of manufacturing a semiconductor device according to claim 34 , further comprising a step of planarizing the second silicon oxide film by etching.
37. A method of manufacturing a semiconductor device, the method comprising the steps of: (a) forming an insulating film on a semiconductor substrate; (b) forming a base layer over the insulating film by carrying out at least the following acts: (1) forming a conductive pad on the insulating film; (2) forming a base layer insulating film on both the conductive pad and the insulating film; (3) forming a plurality of base through holes in the base layer insulating film which through holes extend from the conductive pad to an upper surface of the base layer insulating film; (4) filling the base though holes with a conductive material; (c) forming first through nth intermediate layers over the base layer, n being a positive integer greater than 1, the first intermediate layer being formed on the base layer, the remaining intermediate layers being formed one on top of the other, each of the respective intermediate layers being formed by carrying out at least the following steps: (1) forming a conductive pad on the insulating film of the immediately preceding layer in contact with the conductive material in the through holes of the immediately preceding layer; (2) forming a respective interlayer insulating film on both the conductive pad and the insulating film of the immediately preceding layer; (3) forming a plurality of through holes in the interlayer insulating film of the respective intermediate layer, the through holes extending from the conductive pad of the respective intermediate layer to an upper surface of the interlayer insulating film of the respective intermediate layer; (4) filling each of the through holes of the respective intermediate layer with a conductive material; and (d) forming an upper layer on the nth intermediate layer by carrying out at least the following steps: (1) forming a conductive pad on the interlayer insulating film of the nth intermediate layer in contact with the conductive material in the plurality of through holes in the insulating film of the nth intermediate layer; (2) forming an upper layer insulating film on both the conductive pad of the upper layer and the insulating film of the nth intermediate layer; (3) forming an upper through hole through the upper layer insulating film, said upper through hole being substantially the same size as the conductive pad of the upper layer; and (4) forming a bonding pad on the conductive pad of the upper layer, the bonding pad being located in the upper through hole in the upper layer insulating film, wherein the step (b)(2) of forming the base layer insulating film comprises: forming a first silicon oxide film; coating hydrogen silsesquioxane resin on the silicon oxide film; thermally treating the hydrogen silsesquioxane to form a ceramic silicon oxide film; and forming a second silicon oxide film on the ceramic silicon oxide film by plasma CVD.
38. A method of manufacturing a semiconductor device according to claim 37 , further comprising a step of planarizing the second silicon oxide film by CMP.
39. A method of manufacturing a semiconductor device according to claim 37 , further comprising a step of planarizing the second silicon oxide film by etching.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
May 25, 2001
July 26, 2005
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