Apparatus and methods for forming semiconductor assemblies. An interposer includes a perimeter wall surrounding at least a portion of an upper surface thereof to form a recess. An array of electrical connection pads is located within the recess. A semiconductor die can be flip chip attached to the interposer by at least partial insertion of the semiconductor die within the recess with discrete conductive elements between bond pads of the semiconductor die and electrical connection pads of the interposer. The electrical connection pads communicate with a number of other electrical contact pads accessible elsewhere on the interposer, preferably on a lower surface thereof. A low viscosity underfill encapsulant is disposed between the semiconductor die and the interposer and around the discrete conductive elements by permitting the same to flow into the space between the die and the perimeter wall. The encapsulant may form an underfill or substantially encapsulate the semiconductor die within the recess of the interposer.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method of constructing a semiconductor assembly comprising: providing an interposer including an upper surface and a perimeter wall substantially encircling the upper surface to form a recess, the recess having at least a first upper electrical contact and at least a second upper electrical contact located therein, the interposer further comprising at least one lower electrical connection on a lower surface of the interposer, the at least one lower electrical connection in electrical communication with the at least a first upper electrical contact and the at least a second upper electrical contact; providing a semiconductor die including at least a first bond pad; attaching the semiconductor die within the recess such that the at least first bond pad is adjacent to, and in electrical communication with, either the at least a first upper electrical contact or the at least a second upper electrical contact, and that at least some surface area of the recess is accessible between a periphery of the semiconductor die and the perimeter wall; and disposing an underfill encapsulant into the at least some surface area of the recess by flowing the underfill encapsulant along at least two sides of the semiconductor die having an orientation perpendicular to the interposer, such that the underfill encapsulant flows between the semiconductor die and the upper surface of the interposer.
2. The method of claim 1 , wherein disposing an underfill encapsulant comprises flowing a material between the semiconductor die and the interposer to encapsulate the at least first bond pad, the at least a first upper electrical contact, and the at least a second upper electrical contact pad without use of a pressure differential.
3. The method of claim 1 , further comprising disposing an electrically conductive attachment compound on the at least one lower electrical connection.
4. The method of claim 3 , wherein disposing an electrically conductive attachment compound comprises disposing solder.
5. The method of claim 4 , wherein disposing the solder comprises disposing solder on the at least one lower electrical connection and then reflowing the solder to form a solder ball.
6. The method of claim 1 , further comprising flowing the underfill encapsulant into the recess until the semiconductor die is substantially encapsulated within the underfill encapsulant.
7. A method of constructing a semiconductor assembly comprising: providing an interposer including an upper surface, a perimeter wall substantially encircling the upper surface to form a recess, a plurality of alternative sets of upper electrical contact pads disposed in the recess, and a lower surface including at least a first lower electrical connection, at least one upper electrical contact pad of each alternative set of upper electrical contact pads in electrical communication with the at least a first lower electrical connection; selecting a semiconductor die configured for attachment to at least a first alternative set of upper electrical connection pads of the plurality of alternative sets of upper electrical contact pads disposed in the recess, such that an equivalent bond pad on the semiconductor die is in electrical communication with the at least a first lower electrical connection through the at least one upper electrical contact pad of the at least a first alternative set of upper electrical contact pads in electrical communication therewith; attaching the selected semiconductor die within the recess; forming an electrical communication between at least a first bond pad on the semiconductor die and one upper electrical connection pad of the alternative set of upper electrical connection pads; and flowing an underfill encapsulant into the recess and between the semiconductor die and the interposer.
8. The method of claim 7 , further comprising flowing the underfill encapsulant into the recess until the semiconductor die is substantially encapsulated within the underfill encapsulant.
9. The method of claim 7 , wherein the underfill encapsulant flows without use of a pressure differential.
10. The method of claim 7 , further comprising disposing an electrically conductive attachment compound on the at least first lower electrical connection.
11. The method of claim 10 , wherein disposing an electrically conductive attachment compound comprises disposing solder.
12. The method of claim 11 , wherein disposing solder comprises disposing solder on the at least first lower electrical connection and then reflowing the solder to form a solder ball.
13. The method of claim 7 , wherein flowing an underfill encapsulant into the recess and between the semiconductor die, and the interposer comprises flowing the underfill encapsulant such that the underfill encapsulant flows between the semiconductor die and the upper surface of the interposer by wicking around an electrically communicative connection between the semiconductor die and the interposer.
14. The method of claim 7 , wherein flowing an underfill encapsulant into the recess and between the semiconductor die and the interposer comprises flowing the underfill encapsulant into the recess along at least two sides of the semiconductor die.
15. The method of claim 14 , wherein flowing the underfill encapsulant into the recess along at least two sides of the semiconductor die comprises flowing underfill encapsulant around an entire perimeter of the semiconductor die.
16. The method of claim 7 , wherein providing an interposer including an upper surface, a perimeter wall substantially encircling the upper surface to form a recess, a plurality of alternative sets of upper electrical contact pads disposed in the recess, and a lower surface including at least a first lower electrical connection, at least one upper electrical contact pad of each alternative set of upper electrical contact pads in electrical communication with the at least a first lower electrical connection comprises providing an interposer where the at least one upper electrical contact pad of each alternative set of upper electrical contact pads are in electrical communication with the at least a first lower electrical connection by alternate vias.
17. A method of constructing a semiconductor assembly comprising: providing an interposer including an upper surface, a perimeter wall substantially encircling the upper surface to form a recess, a plurality of alternative sets of upper electrical contact pads disposed in the recess, and a lower surface including at least a first lower electrical connection, at least one upper electrical contact pad of each alternative set of upper electrical contact pads in electrical communication with the at least a first lower electrical connection, the at least one upper electrical contact pad of each alternative set of upper electrical contact pads in electrical communication with the at least a first lower electrical connection by alternative electrical traces; selecting a semiconductor die configured for attachment to at least a first alternative set of upper electrical connection pads of the plurality of alternative sets of upper electrical contact pads disposed in the recess, such that an equivalent bond pad on the semiconductor die is in electrical communication with the at least a first lower electrical connection through the at least one upper electrical contact pad of the at least a first alternative set of upper electrical contact pads in electrical communication therewith; attaching the selected semiconductor die within the recess; forming an electrical communication between at least a first bond pad on the semiconductor die and one upper electrical connection pad of the alternative set of upper electrical connection pads; and flowing an underfill encapsulant into the recess and between the semiconductor die and the interposer.
18. The method of claim 17 , further comprising flowing the underfill encapsulant into the recess until the semiconductor die is substantially encapsulated within the underfill encapsulant.
19. The method of claim 17 , wherein the underfill encapsulant flows without use of a pressure differential.
20. The method of claim 17 , further comprising disposing an electrically conductive attachment compound on the at least first lower electrical connection.
21. The method of claim 20 , wherein disposing an electrically conductive attachment compound comprises disposing solder.
22. The method of claim 21 , wherein disposing solder comprises disposing solder on the at least first lower electrical connection and then reflowing the solder to form a solder ball.
23. The method of claim 17 , wherein flowing an underfill encapsulant into the recess and between the semiconductor die and the interposer comprises flowing the underfill encapsulant into the recess along at least two sides of the semiconductor die.
24. The method of claim 23 , wherein flowing the underfill encapsulant into the recess along at least two sides of the semiconductor die comprises flowing underfill encapsulant around an entire perimeter of the semiconductor die.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
April 26, 2002
September 6, 2005
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