Method of fabricating ferroelectric memory device with photoresist and capping layer

1. A method for fabricating a high density ferroelectric memory device, comprising: forming an interlayer dielectric film on a semiconductor substrate after forming a transistor on the semiconductor substrate; selectively etching the interlayer dielectric film to form a contact hole; burying a plug and a barrier film into the contact hole; forming a conductive film on the interlayer dielectric film including the barrier film, wherein the conductive film is formed by using iridium or ruthenium; selectively etching the conductive film to make both ends of the conductive film inclined so as to form a capping layer for capping the barrier film; forming a lower electrode on the interlayer dielectric film including the capping layer, the lower electrode comprising a material different from the capping layer; forming a ferroelectric thin film on the lower electrode; and forming an upper electrode on the ferroelectric thin film.

2. The method of claim 1 , wherein forming the capping layer comprises: spreading photoresist on the conductive film to form a photoresist film; selectively patterning the photoresist film; flowing the photoresist film thus patterned; and etching the conductive film by using the photoresist film thus flowed as a mask.

3. The method of claim 2 , wherein flowing the patterned photoresist film is carried out by a heat treatment at a temperature of 100° C.˜400° C. for 1 minute to 1 hour under an atmosphere of air, nitrogen or argon.

4. The method of claim 1 , wherein forming the capping layer comprises: forming a hard mask and a photoresist film on the conductive layer in a sequential manner; selectively patterning the photoresist film; and etching the hard mask by using the patterned photoresist film as a mask and etching the conductive film by using the patterned hard mask film as a mask.

5. The method of claim 4 , wherein the hard mask is formed by using any one selected from among TiN, TaN, SiO 2 and SiON, and is deposited to a thickness of 50 Ř500 Šby employing any one selected from among a physical vapor deposition method, a chemical vapor deposition method and an atomic layer deposition method.

6. The method of claim 1 , wherein the lower electrode is an iridium oxide film or a ruthenium oxide film, and is deposited to a thickness of 100 Ř5000 Šby employing any one selected from among a physical vapor deposition method, a chemical vapor deposition method and an atomic layer deposition method.

7. The method of claim 1 , wherein the ferroelectric thin film is formed by using any one selected from among SBT, BLT, SBTN and PZT, and is deposited to a thickness of 100 Ř5000 Šby employing any one selected from among a spin-on method, a chemical vapor deposition method and an atomic layer deposition method.

8. The method of claim 1 , wherein after forming the ferroelectric thin film, a rapid thermal process or a furnace process is carried out, or the rapid thermal process and the furnace process are simultaneously carried out, at a temperature of 500° C.˜800° C. for 1 minute to 2 hours under an atmosphere of oxygen, air, nitrogen or argon.

9. The method of claim 1 , wherein burying the plug and the barrier film comprises: forming a conductive film for the plug on the interlayer dielectric film including the contact hole; carrying out an etch-back on the conductive film to partly fill the contact hole; depositing titanium to form a titanium layer on an entire surface including the plug; heat-treating the titanium layer to form a titanium silicide layer only on the plug; and forming a barrier film on the titanium silicide layer.

10. The method of claim 9 , wherein the conductive film for the plug is formed by using any one selected from among phosphorus-doped polysilicon, arsenic-doped polysilicon, tungsten, tungsten silicide, titanium silicide, titanium nitride, tantalum silicide and tantalum nitride; and the conductive film is deposited to a thickness of 100 Ř5000 Šby employing any one of a chemical vapor deposition method and an atomic layer deposition method.

11. The method of any one of claims 9 and 10 , wherein if polysilicon is used for the conductive layer, the conductive layer is recessed down to a depth of 500 Ř5000 Å, by carrying out a dry or wet etch-back process.

12. The method of claim 9 , wherein a titanium heat treatment is carried out at a temperature of 500° C.˜800° C. for 10 seconds to 10 minutes under an atmosphere of nitrogen or argon.

13. The method of claim 9 , further comprising after heat-treating the titanium: carrying out a wet cleaning process to remove non-reacted titanium atoms by employing the H 2 SO 4 +H 2 O 2 chemical solution; and heat-treating at a temperature of 700° C.˜1000° C. for 10 seconds to 10 minutes under an atmosphere of nitrogen or argon.

14. The method of claim 9 , wherein the barrier film is formed by using any one selected from among TiN, TiAlN, TaN and TaSiN, and is deposited to a thickness of 500 Ř5000 Šby carrying out a chemical vapor deposition method or an atomic layer deposition method.