Patentable/Patents/US-6967170
US-6967170

Methods of forming silicon nitride spacers, and methods of forming dielectric sidewall spacers

PublishedNovember 22, 2005
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

The invention includes a method of patterning a material over a semiconductive substrate, comprising: a) forming a layer of first material against a second material and over the substrate, the substrate comprising a surface having a center and an edge; b) first etching the first material in a reaction chamber, the first etching comprising a first center-to-edge uniformity across the surface of the wafer and comprising a first selectivity for the first material relative to the second material; c) second etching the first material in the reaction chamber, the second etching comprising a second selectivity for the first material relative to the second material, the second center-to-edge uniformity being less than the first center-to-edge uniformity, the second selectivity being greater than the first selectivity; and d) cleaning a component of the first material from at least one sidewall of the reaction chamber between the first and second etchings.

Patent Claims
30 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A method of forming silicon nitride spacers, comprising: forming a silicon dioxide layer proximate a transistor gate assembly; forming a silicon nitride layer over the transistor gate assembly and over the silicon dioxide layer; first plasma etching the silicon nitride, the first plasma etching comprising a first center-to-edge uniformity across a surface of a substrate supporting the gate assembly and comprising a first selectivity for the silicon nitride relative to the silicon oxide; second plasma etching the silicon nitride, the second plasma etching comprising a second center-to-edge uniformity across the surface and comprising a second selectivity for the silicon nitride relative to the silicon oxide, the second center-to-edge uniformity being less than the first center-to-edge uniformity, the second selectivity being greater than the first selectivity, the first and second plasma etchings patterning the silicon nitride into spacers proximate the transistor gate; and cleaning a component of the silicon nitride from at least one sidewall of a reaction chamber containing the substrate between the first plasma etching and the second plasma etching.

2

2. The method of claim 1 wherein the component comprises nitrogen.

3

3. The method of claim 1 wherein the first plasma etching comprises a different pressure than the plasma second etching.

4

4. The method of claim 1 wherein the substrate is provided with a different bias power during the first plasma etching than during the second plasma etching.

5

5. The method of claim 1 wherein the cleaning comprises exposing the sidewall to a plasma comprising SF 6 and oxygen atoms.

6

6. The method of claim 1 wherein the cleaning comprises: exposing the sidewall to a plasma comprising SF 6 and oxygen atoms; maintaining a pressure within the reaction chamber at from about 20 mTorr to about 60 mTorr; and maintaining the substrate at a bias power of 0.

7

7. The method of claim 1 wherein the cleaning comprises exposing the sidewall to a plasma comprising chlorine atoms and oxygen atoms.

8

8. The method of claim 1 wherein the cleaning comprises: exposing the sidewall to a plasma comprising chlorine atoms and oxygen atoms; maintaining a pressure within the reaction chamber at from about 20 mTorr to about 60 mTorr; and maintaining the substrate at a bias power of 0.

9

9. The method of claim 1 wherein the cleaning comprises exposing the sidewall to a plasma comprising NF 3 and oxygen atoms.

10

10. The method of claim 1 wherein the cleaning comprises: exposing the sidewall to a plasma comprising NF 3 and oxygen atoms; maintaining a pressure within the reaction chamber at from about 20 mTorr to about 60 mTorr; and maintaining the substrate at a bias power of 0.

11

11. The method of claim 1 wherein the second plasma etching creates a debris, the method further comprising monitoring the debris for the component to determine when the second plasma etching has penetrated the silicon nitride.

12

12. The method of claim 11 wherein the monitoring and determining are accomplished entirely by an automated mechanism, the automated mechanism comprising software configured to recognize a drop in a component concentration in the debris.

13

13. The method of claim 1 wherein the substrate comprises monocrystalline silicon and the first and second selectivities are also with respect to monocrystalline silicon of the substrate.

14

14. The method of claim 1 wherein the substrate comprises monocrystalline silicon.

15

15. The method of claim 1 wherein the cleaning comprises exposing the sidewall to a plasma incorporating a gas chosen from a group consisting of NF 3 , SF 6 and chlorine.

16

16. A method of forming dielectric sidewall spacers, comprising: forming a transistor gate assembly over a semiconductive substrate, the semiconductive substrate comprising a surface having a center and an edge; forming a first material proximate the transistor gate assembly; forming a second material over the transistor gate assembly and over the first material; first plasma etching the second material, the first plasma etching comprising a first center-to-edge uniformity across a surface of the substrate and comprising a first selectivity for the second material relative to the first material; second plasma etching the second material, the second plasma etching comprising a second center-to-edge uniformity across the surface and comprising a second selectivity for the second material relative to the first material, the second center-to-edge uniformity being less than the first center-to-edge uniformity, the second selectivity being greater than the first selectivity, the first and second plasma etchings patterning the second material into spacers proximate the transistor gate; and cleaning a component of the second material from at least one sidewall of a reaction chamber containing the substrate between the first plasma etching and the second plasma etching.

17

17. The method of claim 16 wherein the second material comprises silicon nitride and the component cleaned from the at least one sidewall comprises a nitrogen-comprising species.

18

18. The method of claim 16 wherein the second material comprises silicon nitride and the component cleaned from the at least one sidewall comprises a silicon-comprising species.

19

19. The method of claim 16 wherein the second material consists essentially of silicon and the component cleaned from the at least one sidewall comprises a silicon-comprising species.

20

20. The method of claim 16 wherein the first plasma etching comprises a different pressure than the second plasma etching.

21

21. The method of claim 16 wherein the semiconductive substrate is provided with a different bias power during the first plasma etching than during the second plasma etching.

22

22. The method of claim 16 wherein the first plasma etching comprises a first plasma etch chemistry and the second plasma etching comprises a second plasma etch chemistry, respectively, the first and second plasma etch chemistries having different chemical compositions from one another.

23

23. The method of claim 16 wherein the first and second plasma etchings pattern the second material.

24

24. The method of claim 16 wherein the cleaning comprises exposing the at least one sidewall to a plasma comprising both SF 6 and oxygen atoms.

25

25. The method of claim 16 wherein the cleaning comprises exposing the sidewall to a plasma comprising both chlorine atoms and oxygen atoms.

26

26. The method of claim 16 wherein the cleaning comprises exposing the at least one sidewall to a plasma comprising both NF 3 and oxygen atoms.

27

27. The method of claim 16 wherein the semiconductive substrate comprises monocrystalline silicon and the first material is monocrystalline silicon of the substrate.

28

28. The method of claim 27 wherein the first material is not monocrystalline silicon.

29

29. The method of claim 15 wherein second plasma etching creates a debris, the method further comprising: monitoring the debris for the component; and determining when the second plasma etching has penetrated the first material by detecting the component.

30

30. The method of claim 29 wherein the monitoring and determining are accomplished entirely by an automated mechanism, the automated mechanism comprising software configured to recognize a drop in a concentration of the component in the debris.

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Patent Metadata

Filing Date

September 30, 2002

Publication Date

November 22, 2005

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Cite as: Patentable. “Methods of forming silicon nitride spacers, and methods of forming dielectric sidewall spacers” (US-6967170). https://patentable.app/patents/US-6967170

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