Patentable/Patents/US-6989337
US-6989337

Silicon oxide gap-filling process

PublishedJanuary 24, 2006
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

A silicon oxide gap-filling process is described, wherein a CVD process having an etching effect is performed to fill up a trench with silicon oxide. The reaction gases used in the CVD process include deposition gases and He/H2 mixed gas as a sputtering-etching gas, wherein the percentage of the He/H2 mixed gas in the total reaction gases is raised with the increase of the aspect ratio of the trench.

Patent Claims
8 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A silicon oxide gap-filling process, comprising: providing a substrate having a trench thereon, wherein an aspect ratio of the trench is 4.0 at least; and performing a CVD process having an etching effect to fill up the trench with silicon oxide, wherein reaction gases used in the CVD process comprise deposition gases and He/H 2 mixed gas as a sputtering-etching gas, wherein an ED ratio of the CVD process is 0.03–0.1 and a percentage of the He/H 2 mixed gas in the total reaction gases is 70% at least.

2

2. The silicon oxide gap-filling process of claim 1 , wherein the CVD process comprises an HDP-CVD process.

3

3. The silicon oxide gap-filling process of claim 1 , wherein a ratio of He to H 2 (He/H 2 ratio) in the He/H 2 mixed gas is 0.3–4.0.

4

4. The silicon oxide gap-filling process of claim 1 , wherein the deposition gases comprise SiH 4 and O 2 .

5

5. The silicon oxide gap-filling process of claim 4 , wherein in the CVD process, a flow rate of SiH 4 is 20–100 sccm, a flow rate of O 2 is 40–200 sccm, a flow rate of H 2 is 100–2000 sccm, a flow rate of He is 200–2000 sccm, a pressure is 5–20 mTorr, a temperature is 400–650° C., a low-frequency RF power is 3000–15000 W, and a high-frequency RF power is 500–5000 W.

6

6. The silicon oxide gap-filling process of claim 1 , which is applied to an STI process in a 90 nm semiconductor process.

7

7. A silicon oxide gap-filling process, comprising: providing a substrate having a trench thereon, wherein an aspect ratio of the trench is at least 4.0; performing an HDP-CVD process to fill up the trench with silicon oxide, wherein reaction gases used in the HDP-CVD process comprise SiH 4 , O 2 , He and H 2 , wherein a flow rate of SiH 4 is 20–100 sccm, a flow rate of O 2 is 40–200 sccm, a flow rate of H 2 is 100–2000 sccm, a flow rate of He is 200–2000 sccm, a pressure is 5–20 mTorr, a temperature is 400–650° C., a low-frequency RE power is 3000–15000 W, and a high-frequency RF power is 500–5000 W; an ED ratio of the HDP-CVD process is 0.1–0.03; and a percentage of the He/H 2 mixed gas in the total reaction gases is at least 70%.

8

8. The silicon oxide gap-filling process of claim 7 , which is applied to an STI process in a 90 nm semiconductor process.

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Patent Metadata

Filing Date

October 2, 2003

Publication Date

January 24, 2006

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