An interconnect architecture for connecting a plurality of closely-spaced electrical elements on a first integrated circuit fabricated structure with operative circuits on a second integrated circuit fabricated structure. In one embodiment, the first integrated circuit fabricated structure comprises a plurality of photo sensors. Conductive interconnect elements on the first integrated circuit fabricated structure provide electrical connection between individual photo sensors and the operative circuitry on the second integrated circuit fabricated structure.
Legal claims defining the scope of protection, as filed with the USPTO.
1. An image sensing and processing system, comprising: a first integrated circuit comprising a plurality of image sensing elements responsive to electromagnetic radiation directed toward a first surface thereof and a plurality of first conductive interconnect elements disposed on a second surface thereof, wherein the plurality of image sensing elements further comprise elements selected responsive to the image sensing functionality of the first integrated circuit; and a second integrated circuit comprising a plurality of image signal processing elements and a plurality of second conductive interconnect elements formed on a surface thereof and in electrical communication with the pluraliy of first conductive interconnect elements, wherein the plurality of image signal processing elements further comprise elements selected responsive to the image signal processing functionality of the second integrated circuit and wherein a pitch of the plurality of first interconnect elements is equal to a pitch of the plurality of second interconnect elements.
2. An image sensing and processing system, comprising: a first integrated circuit comprising a plurality of image sensing elements responsive to electromagnetic radiation directed toward a first surface thereof and a plurality of first conductive interconnect elements disposed on a second surface thereof, wherein the plurality of image sensing elements further comprise elements selected responsive to the image sensing functionality of the first integrated circuit, and wherein the first integrated circuit comprises a semiconductor substrate of a first conductivity type and a plurality of spaced apart doped semiconductor regions of a second conductivity type formed in a surface of the semiconductor substrate, and wherein a reverse bias potential is applied to the semiconductor substrate and the doped regions to create a depletion region therebetween; and a second integrated circuit comprising a plurality of image signal processing elements and a plurality of second conductive interconnect elements formed on a surface thereof and in electrical communication with the plurality of first conductive interconnect elements, wherein the plurality of image signal processing elements further comprise elements selected responsive to the image signal processing functionality of the second integrated circuit.
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August 8, 2003
May 16, 2006
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