Techniques of reducing erroneous readings of the apparent charge levels stored in a number of rows of memory cells on account of capacitive coupling between the cells. All pages of a first row are programmed with a first pass, followed by programming all pages of a second adjacent row with a first pass, after which the first row is programmed with a second pass, and then all pages of a third row are programmed with a first pass, followed by returning to program the second row with a second pass, and so on, in a back-and-forth manner across the rows of an array. This minimizes the effect on the apparent charge stored on rows of memory cells that can occur by later writing data into adjacent rows of memory cells.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method of operating a non-volatile memory having memory cells that store data as different levels of charge in charge storage elements thereof, wherein the memory cells are connected in series strings that individually include eight or more memory cells and have word lines extending across the memory cells of different strings to define rows of memory cells, comprising: programming the charge storage elements of a first one of the rows with a first set of data to levels that are less than full charge levels for such data but which still represent the first set of data, thereafter programming the charge storage elements of a second one of the rows with a second set of data to levels that are less than full charge levels for such data but which still represent the second set of data, wherein the charge storage elements of the first and second rows are field coupled with each other, and thereafter increasing the charge levels on the charge storage elements of the first row to the full storage levels representing the first set of data.
2. The method of claim 1 , wherein increasing the charge levels on the charge storage elements of the first row includes: reading the data represented by the less than full charge levels stored in the memory cells of the first row, and thereafter programming the memory cells of the first row with the data read therefrom to increase the charge levels on the charge storage elements of the first row to the full storage levels represented by the first set of data.
3. The method of claim 2 , wherein increasing the charge levels on the charge storage elements of the first row is accomplished without erasing the charge levels stored in the memory cells of the first row.
4. The method of claim 1 , wherein the charge storage elements are electrically conductive floating gates.
5. The method of claim 1 , wherein the different levels of charge that store data in the charge storage elements include more than two defined levels, thereby to store more than one bit of data in individual charge storage elements.
6. The method of claim 1 , wherein programming the charge storage elements of the first row with a first set of data includes storing an indication that the data are stored with charge levels that are less than full charge levels for such data, and wherein increasing the charge levels on the charge storage elements of the first row includes storing an indication that the data are stored with charge levels that are the full storage levels representing the first set of data.
7. The method of claim 6 , additionally comprising reading data from the charge storage elements of the first row in a manner dependent upon the stored indication.
8. A method of operating a non-volatile memory having memory cells that store data as different levels of charge in charge storage elements thereof and which are arranged in defined groups of memory cells, comprising: programming the charge storage elements of a first one of the groups of memory cells with a first set of data to levels that are less than full charge levels for such data but which still represent the first set of data, including storing an indication that the data have been programmed with less than the full charge levels, thereafter programming the charge storage elements of a second one of the groups with a second set of data to levels that are less than full charge levels for such data but which still represent the second set of data, including storing an indication that the data have been programmed with less than the full charge levels, wherein the charge storage elements of the first and second groups are field coupled with each other, and thereafter increasing the charge levels on the charge storage elements of the first group to the full storage levels representing the first set of data, including: reading the data represented by the less than full charge levels stored in the memory cells of the first group, thereafter programming the memory cells of the first group with the data read therefrom to increase the charge levels on the charge storage elements of the first group to the full storage levels represented by the first set of data, and storing an indication that the data have been programmed in the first group with the full charge levels.
9. The method of claim 8 , wherein increasing the charge levels on the charge storage elements of the first group is accomplished without erasing the less than full charge levels stored in the charge storage elements of the first group.
10. The method of claim 8 , wherein the charge storage elements are electrically conductive floating gates.
11. The method of claim 8 , wherein the different levels of charge that store data in the charge storage elements include more than two defined levels, thereby to store more than one bit of data in individual charge storage elements.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
February 9, 2005
May 16, 2006
Browse 5M+ US patents with plain-English claim translations and AI-generated analysis.