A method and apparatus for facilitating direct access to a parallel Advanced Technology Attachment (ATA) device by an autonomous subsystem in the absence of the main operating system (OS).
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method comprising: determining a power state of a first system, the power state to be one of at least a first and second power states, the second power state to consume less power than the first power state; and in response to the system being in the second power state, switching, without using a main operating system, a parallel Advanced Technology Attachment (PATA) link from the first system to a link with an autonomous subsystem.
2. The method of claim 1 , wherein the power state comprises an Advanced Configuration Power Interface Specification (ACPI) state.
3. The method of claim 2 , wherein if the ACPI state is S 0 , S 1 , or S 2 then the PATA is switched to the first system, and if the ACPI state is S 3 , S 4 , or S 5 then the PATA is switched to the subsystem.
4. The method of claim 2 , wherein if the ACPI state is SO, or S 1 then the PATA is switched to the first system, and if the ACPI state is S 2 , S 3 , S 4 , or S 5 then the PATA is switched to the subsystem.
5. A machine-readable medium having stored thereon data representing sets of instructions which, when executed by a machine, cause the machine to: determine a power state of a first system, the power state to be at least one of a first and second power states, the second power state to consume less power than the first power state; and in response to the system being in the second power state, switch, without using a main operating system, a parallel Advanced Technology Attachment (PATA) Jink from the first system to a link with an autonomous subsystem.
6. The machine-readable medium of claim 5 , wherein the power state comprises an Advanced Configuration Power Interface Specification (ACPI) state.
7. The machine-readable medium of claim 6 , wherein if the ACPI state is SO, S 1 , or S 2 then the PATA is switched to the first system, and if the ACPI state is S 3 , S 4 , or S 5 then the PATA is switched to the subsystem.
8. The machine-readable medium of claim 6 , wherein if the ACPI state is SO, or S 1 then the PATA is switched to the first system, and if the ACPI state is S 2 , S 3 , S 4 , or S 5 then the PATA is switched to the subsystem.
9. A system comprising: a memory; a Parallel Advance Technology Attachment (PATA) device connected to the memory and to a switch; and the switch to connect the system to the PATA device when the system is in a first power state, and connect an autonomous subsystem to the PATA device, without using a main operating system, when the system is in a second power state, the second power state to consume less power than the first power state.
10. The system of claim 9 , wherein the switch connecting the PATA device alternately connects the system and the subsystem to the PATA device.
11. The system of claim 9 , wherein the switch operation is controlled by signals from the system.
12. An apparams comprising: a Parallel Advanced Technology Attachment (PATA) device connected to a switch; and the switch to connect a system to the PATA device when the system is in a first power state, and connect an autonomous subsystem to the PATA device, without using a main operating system, when the system is in a second power state, the second power state to consume less power than the first power state.
13. The apparatus of claim 12 , wherein the switch connecting the PATA device only connects to either the system or the subsystem.
14. The apparatus of claim 12 , wherein the switch operation is controlled by signals from the system.
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December 28, 2000
June 6, 2006
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