A method for detemiining fringing capacitances on passive devices within an integrated circuit is disclosed. A fringing capacitance region on a passive device is initially divided into a group of fringing electric field areas. A set of fringing capacitance equations is then developed for the fringing electric field areas accordingly. A determination is made as to whether or not an accuracy of the fringing capacitance equations meets a predetermined threshold. If so, then the fringing capacitance equations are utilized in compact device models to determine fringing capacitance on the passive device; otherwise, the physically-based fringing capacitance equations are fitted to a set of extracted data to generate a refined set of physically-based fringing capacitance equations, and the refined set of physically-based fringing capacitance equations is utilized in compact device models to determine fringing capacitance on the passive device.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method for determining fringing capacitance on a passive device within an integrated circuit, said method comprising: dividing a fringing capacitance region on said passive device into a plurality of fringing electric field areas; developing a set of physically-based fringing capacitance equations for said plurality of fringing electric field areas accordingly; determining whether or not an accuracy of said set of physically-based fringing capacitance equations meets a predetermined threshold; and in response to a determination that an accuracy of said set of physically-based fringing capacitance equations meets said predetermined threshold, utilizing said set of physically-based fringing capacitance equations in compact device models to determine fringing capacitance on said passive device.
2. The method of claim 1 , wherein said method further includes in response to a determination that an accuracy of said set of physically-based fringing capacitance equations does not meet said predetermined threshold, fitting said set of physically-based fringing capacitance equations to a set of extracted data to generate a refined set of physically-based fringing capacitance equations; and utilizing said refined set of physically-based fringing capacitance equations in compact device models to determine fringing capacitance on said passive device.
3. The method of claim 2 , wherein said set of extracted data is produced by extracting a fringing capacitance from a plurality of test passive devices.
4. The method of claim 3 , wherein said determining further includes comparing results obtained from said set of physically-based fringing capacitance equations and said set of extracted data.
5. The method of claim 1 , wherein electric field is constant along each field line within said plurality of fringing electric field areas.
6. The method of claim 1 , wherein electric field within some of said plurality of fringing electric field areas is formed by quarter circular lines.
7. The method of claim 1 , wherein electric field within some of said plurality of fringing electric field areas is formed by a quarter circular line in combination with a vertical straight line.
8. The method of claim 1 , wherein effects from inter-layer vias are ignored from said set of physically-based fringing capacitance equations.
9. A computer program product residing on a computer usable medium for determining fringing capacitance on a passive device within an integrated circuit, said computer program product comprising: program code means for dividing a fringing capacitance region on said passive device into a plurality of fringing electric field areas; program code means for developing a set of physically-based fringing capacitance equations for said plurality of fringing electric field areas accordingly; program code means for determining whether or not an accuracy of said set of physically-based fringing capacitance equations meets a predetermined threshold; and program code means for utilizing said set of physically-based fringing capacitance equations in compact device models to determine fringing capacitance on said passive device, in response to a determination that an accuracy of said set of physically-based fringing capacitance equations meets said predetermined threshold.
10. The computer program product of claim 9 , wherein said computer program product further includes in response to a determination that an accuracy of said set of physically-based fringing capacitance equations does not meet said predetermined threshold, program code means for fitting said set of physically-based fringing capacitance equations to a set of extracted data to generate a refined set of physically-based fringing capacitance equations; and program code means for utilizing said refined set of physically-based fringing capacitance equations in compact device models to determine fringing capacitance on said passive device.
11. The computer program product of claim 10 , wherein said set of extracted data is produced by program code means for extracting a fringing capacitance from a plurality of test passive devices.
12. The computer program product of claim 11 , wherein said program code means for determining further includes program code means for comparing results obtained from said set of physically-based fringing capacitance equations and said set of extracted data.
13. The computer program product of claim 9 , wherein electric field is constant along each field line within said plurality of fringing electric field areas.
14. The computer program product of claim 9 , wherein electric field within some of said plurality of fringing electric field areas is formed by quarter circular lines.
15. The computer program product of claim 9 , wherein electric field within some of said plurality of fringing electric field areas is formed by a quarter circular line in combination with a vertical straight line.
16. The computer program product of claim 9 , wherein effects from interlayer vias are ignored from said set of physically-based fringing capacitance equations.
17. A computer system for determining fringing capacitance on a passive device within an integrated circuit, said computer system comprising: means for dividing a fringing capacitance region on said passive device into a plurality of fringing electric field areas; means for developing a set of physically-based fringing capacitance equations for said plurality of fringing electric field areas accordingly; means for determining whether or not an accuracy of said set of physically-based fringing capacitance equations meets a predetermined threshold; and means for utilizing said set of physically-based fringing capacitance equations in compact device models to determine fringing capacitance on said passive device, in response to a determination that an accuracy of said set of physically-based fringing capacitance equations meets said predetermined threshold.
18. The computer system of claim 17 , wherein said method further includes in response to a determination that an accuracy of said set of physically-based fringing capacitance equations does not meet said predetermined threshold, means for fitting said set of physically-based fringing capacitance equations to a set of extracted data to generate a refined set of physically-based fringing capacitance equations; and means for utilizing said refined set of physically-based fringing capacitance equations in compact device models to determine fringing capacitance on said passive device.
19. The computer system of claim 18 , wherein said set of extracted data is produced by means for extracting a fringing capacitance from a plurality of test passive devices.
20. The computer system of claim 19 , wherein said means for determining further includes means for comparing results obtained from said set of physically-based fringing capacitance equations and said set of extracted data.
21. The computer system of claim 17 , wherein electric field is constant along each field line within said plurality of fringing electric field areas.
22. The computer system of claim 17 , wherein electric field within some of said plurality of fringing electric field areas is formed by quarter circular lines.
23. The computer system of claim 17 , wherein electric field within some of said plurality of fringing electric field areas is formed by a quarter circular line in combination with a vertical straight line.
24. The computer system of claim 17 , wherein effects from interlayer vias are ignored from said set of physically-based fringing capacitance equations.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
July 16, 2004
September 5, 2006
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