Patentable/Patents/US-7111140
US-7111140

Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash memory devices

PublishedSeptember 19, 2006
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

In one embodiment of the present invention, a memory storage system for storing information organized in sectors within a nonvolatile memory bank is disclosed. The memory bank is defined by sector storage locations spanning across one or more rows of a nonvolatile memory device, each the sector including a user data portion and an overhead portion. The sectors being organized into blocks with each sector identified by a host provided logical block address (LBA). Each block is identified by a modified LBA derived from the host-provided LBA and said virtual PBA, said host-provided LBA being received by the storage device from the host for identifying a sector of information to be accessed, the actual PBA developed by said storage device for identifying a free location within said memory bank wherein said accessed sector is to be stored. The storage system includes a memory controller coupled to the host; and a nonvolatile memory bank coupled to the memory controller via a memory bus, the memory bank being included in a non-volatile semiconductor memory unit, the memory bank has storage blocks each of which includes a first row-portion located in said memory unit, and a corresponding second row-portion located in each of the memory unit, each of the memory row-portions provides storage space for two of said sectors, wherein the speed of performing write operations is increased by writing sector information to the memory unit simultaneously.

Patent Claims
4 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A memory storage system for increasing the performance of write operations of sector information to storage locations within non-volatile memory unit, the sector locations organized into sub-blocks and a plurality of sub-blocks defining a block comprising: memory control circuitry, coupled to the non-volatile memory unit for receiving user data of sector information included in a sector, from a host, said received user data identifiable by addresses of a predetermined order, said memory control circuitry for writing said received user data to a first storage location of a particular sub-block of a particular block, said memory control circuitry for further writing user data of sector information to a first storage location of a sub-block of the particular block that is other than the particular sub-block regardless of the predetermined order of the addresses of the received sectors, a single virtual physical block address selectable based upon the identification of a free storage location within said non-volatile memory unit for identifying the storage locations of said sub-block of the particular block, wherein writing of sector information to the first storage location of the sub-blocks of the particular block is performed substantially concurrently thereby increasing the performance of write operations.

2

2. A memory storage system as recited in claim 1 wherein said non-volatile memory unit includes one or more nonvolatile memory devices.

3

3. A memory storage system for increasing the performance of programming operations of sector information to storage locations within non-volatile memory unit, the sector locations organized into sub-blocks and a plurality of sub-blocks defining a block comprising: memory control circuitry, coupled to the non-volatile memory unit, for receiving user data of sectors of information from the host, said received user data of sectors of information identifiable by addresses of a predetermined order, said memory control circuitry for programming sector information, received from the host, to a first storage location of a particular sub-block of a particular block, said memory control circuitry for further programming said user data of said sectors of information to a first storage location of a sub-block of the particular block that is other than the particular sub-block regardless of the predetermined order of the addresses of the received sectors, a single virtual physical block address selectable based upon the identification of a free storage location within said non-volatile memory unit for identifying the storage locations of said sub-block of the particular block, wherein programming of sector information to the first storage location of the sub-blocks of the particular block is performed substantially concurrently thereby increasing the performance of programming operations.

4

4. A memory storage system as recited in claim 3 wherein said non-volatile memory unit includes one or more nonvolatile memory devices.

Classification Codes (CPC)

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Patent Metadata

Filing Date

April 26, 2004

Publication Date

September 19, 2006

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Cite as: Patentable. “Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash memory devices” (US-7111140). https://patentable.app/patents/US-7111140

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