Charge pump with large bypass capacitors

1. A charge pump including a first current source and a second current source connected in series between a high voltage source and a low voltage source, the charge pump comprising: a PMOS transistor functioning as the first current source, a source of the PMOS transistor being connected to the high voltage source and a gate of the PMOS transistor being selectively connected to the high voltage source; a first capacitor connected to the high voltage source and selectively connected to a gate of the PMOS transistor; a first bias generator for charging the first capacitor; an NMOS transistor functioning as the second current source, a source of the NMOS transistor being connected to the low voltage source, and a drain of the NMOS transistor being connected to a drain of the PMOS transistor, and a gate of the NMOS transistor being selectively connected to the low voltage source; a second capacitor connected to the low voltage source and selectively connected to a gate of the NMOS transistor; and a second bias generator for charging the second capacitor, wherein the first and second bias generators include a current mirror circuit, wherein the current mirror circuit includes: a mirrored PMOS transistor having a source connected to the high voltage source and a gate connected to its drain and to the first capacitor; a first mirrored NMOS transistor having a source connected to the low voltage source and a gate connected to the second capacitor; a second mirrored NMOS transistor having a source connected to the low voltage source and a gate connected to the gate of the first mirrored NMOS transistor; and a bias current source connected between the high voltage source and a drain of the second mirrored NMOS transistor, wherein the gate and drain of the second mirrored NMOS transistor are connected, and wherein the drains of the mirrored PMOS transistor and the first mirrored NMOS transistor are connected.

2. The charge pump of claim 1 , further including an operational amplifier having a positive input terminal connected to the drains of the mirrored PMOS transistor and the first mirrored NMOS transistor, a negative input terminal connected to the drains of the PMOS transistor and the NMOS transistor, and an output terminal connected to the first capacitor.

3. A charge pump including a first current source and a second current source connected in series between a high voltage source and a low voltage source, the charge pump comprising: a PMOS transistor functioning as the first current source, a source of the PMOS transistor being connected to the high voltage source and a gate of the PMOS transistor being selectively connected to the high voltage source; a first capacitor connected to the high voltage source and selectively connected to a gate of the PMOS transistor; a first bias generator for charging the first capacitor; an NMOS transistor functioning as the second current source, a source of the NMOS transistor being connected to the low voltage source, a drain of the NMOS transistor being connected to a drain of the PMOS transistor, and a gate of the NMOS transistor being selectively connected to the low voltage source; a second capacitor connected to the low voltage source and selectively connected to a gate of the NMOS transistor; and a second bias generator for charging the second capacitor, wherein the first and second bias generators include a current mirror circuit, wherein the current mirror circuit includes: a PMOS bias transistor having a source connected to the high voltage source and a gate connected to the first capacitor; a first mirrored NMOS transistor having a source connected to the low voltage source and a gate connected to the second capacitor; a second mirrored NMOS transistor having a source connected to the low voltage source and a gate connected to the gate of the first mirrored NMOS transistor; and an operational amplifier having a positive input terminal connected to the drains of the PMOS bias transistor and the first mirrored NMOS transistor, a negative input terminal connected to the drains of the PMOS bias transistor and the NMOS transistor, and an output terminal connected to the first capacitor and the gate of the PMOS bias transistor; and a bias current source connected between the high voltage source and a drain of the second mirrored NMOS transistor, wherein the gate and drain of the second mirrored NMOS transistor are connected, and wherein the drains of the PMOS bias transistor and the first mirrored NMOS transistor are connected.

4. A charge pump including a first current source and a second current source connected in series between a high voltage source and a low voltage source, the charge pump comprising: a PMOS transistor functioning as the first current source; an NMOS transistor functioning as the second current source; capacitive circuits for turning on the PMOS transistor and the NMOS transistor; switches for turning off the PMOS transistor and the NMOS transistor; a current mirror in operative relation to the PMOS transistor and the NMOS transistor, the current mirror for matching currents of the PMOS transistor and the NMOS transistor; and an operational amplifier in operative relation to the current mirror, the PMOS transistor, and the NMOS transistor, wherein the operational amplifier can adjust the current of the PMOS transistor.

5. A method of designing a charge pump, the method comprising: connecting a source of a PMOS transistor to a high voltage source and selectively connecting a gate of the PMOS transistor to the high voltage source; connecting a first capacitor to the high voltage source; selectively connecting the first capacitor to a gate of the PMOS transistor; providing a first bias generator for charging the first capacitor; connecting a source of an NMOS transistor to a low voltage source and selectively connecting a gate of the NMOS transistor to the low voltage source; connecting a drain of the NMOS transistor to a drain of the PMOS transistor; connecting a second capacitor to the low voltage source; selectively connecting the second capacitor to a gate of the NMOS transistor; providing a second bias generator for charging the second capacitor; implementing the first and second bias generators with a current mirror circuit, wherein the PMOS and NMOS transistors function as current sources, and wherein the first and second capacitors function to rapidly turn on the PMOS and NMOS transistors, wherein the current mirror circuit includes a mirrored PMOS transistor, a first mirrored NMOS transistor, a second mirrored NMOS transistor, and a bias current source, wherein the method further includes: connecting a source of the mirrored PMOS transistor to the high voltage source; connecting a gate of the mirrored PMOS transistor to the first capacitor and to the drain the mirrored PMOS transistor; connecting a source of the first mirrored NMOS transistor to the low voltage source; connecting a gate of the first mirrored NMOS transistor to the second capacitor; connecting a source of the second mirrored NMOS transistor to the low voltage source; connecting a gate of the second mirrored NMOS transistor to the gate of the first mirrored NMOS transistor; connecting a bias current source between the high voltage source and a drain of the second mirrored NMOS transistor; connecting the gate and drain of the second mirrored NMOS transistor; and connecting the drains of the mirrored PMOS transistor and the first mirrored NMOS transistor.

6. A method of designing a charge pump, the method comprising: connecting a source of a PMOS transistor to a high voltage source and selectively connecting a gate of the PMOS transistor to the high voltage source; connecting a first capacitor to the high voltage source; selectively connecting the first capacitor to a gate of the PMOS transistor; providing a first bias generator for charging the first capacitor; connecting a source of an NMOS transistor to a low voltage source and selectively connecting a gate of the NMOS transistor to the low voltage source; connecting a drain of the NMOS transistor to a drain of the PMOS transistor; connecting a second capacitor to the low voltage source; selectively connecting the second capacitor to a gate of the NMOS transistor; providing a second bias generator for charging the second capacitor; implementing the first and second bias generators with a current mirror circuit, wherein the PMOS and NMOS transistors function as current sources, and wherein the first and second capacitors function to rapidly turn on the PMOS and NMOS transistors, wherein the current mirror circuit includes a PMOS bias transistor, a first mirrored NMOS transistor, a second mirrored NMOS transistor, an operational amplifier and a bias current source, wherein the method further includes: connecting a source of the PMOS bias transistor to the high voltage source; connecting a gate of the PMOS bias transistor to the first capacitor; connecting a source of the first mirrored NMOS transistor to the low voltage source; connecting a gate of the first mirrored NMOS transistor to the second capacitor; connecting a source of the second mirrored NMOS transistor to the low voltage source; connecting a gate of the second mirrored NMOS transistor to the gate of the first mirrored NMOS transistor; connecting a bias current source between the high voltage source and a drain of the second mirrored NMOS transistor; connecting the gate and drain of the second mirrored NMOS transistor; and connecting the drains of the PMOS bias transistor and the first mirrored NMOS transistor; and connecting the positive input terminal of the operational amplifier to the drains of the PMOS bias transistor and the first mirrored NMOS transistor; and connecting a negative input terminal of the operational amplifier to the drains of the PMOS transistor and the NMOS transistor; and connecting an output terminal of the operational amplifier to the first capacitor.