A method for identifying areas of low overburden which degrade (increase) metal polish nonuniformity is discussed. Also described is a method for modifying these areas to increase their overburden, thus slowing down the metal polish rate and improving overall polish uniformity. The resulting structure forms slots in groups of functional lines, such as bus lines, when the functional lines have a density prior to forming the slots that exceeds a predetermined amount. In one embodiment, an area of the wafer has a maximum width of 1.5 microns in an area that has a feature density greater than approximately 50 percent. The methods and resulting structures create a higher feature density, thereby increasing polishing uniformity.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method of implementing polishing uniformity, said method comprising: providing layout data; constructing an overburden distribution of a material on a substrate using the layout data; identifying from the overburden distribution at least one area having an overburden lower than a threshold amount, the at least one area representative of a given density of patterned material; and modifying the layout data as a function of the at least one area, wherein modifying the layout data includes adding slots to the patterned material in the at least one area and concurrently maintaining a density of the material in the at least one area to be substantially the same subsequent to modifying the layout data.
2. The method of claim 1 , wherein the overburden distribution is a function of the layout data of the patterned material and a plating model of the patterned material, the plating model for use in determining overburden across an area of the patterned material.
3. The method of claim 1 , wherein constructing the overburden distribution further comprises constructing the overburden distribution according to a plating model for the patterned material.
4. The method of claim 1 , wherein identifying the at least one area having an overburden lower than the threshold amount further comprises identifying a group of wide lines collected together.
5. The method of claim 4 , wherein the group of wide lines comprises lines greater than approximately 5 μm in width, and wherein the group of wide lines comprises wide lines collected to greater than fifty percent (50%) density in an area comprising a width greater than an approximately 50 microns and a length greater than approximately 50 microns.
6. The method of claim 4 , wherein the group of wide lines collected together comprise at least one of the group consisting of power bus lines and ground bus lines.
7. The method of claim 1 , wherein the at least one area includes a group of wide lines, and wherein adding slots to the at least one area includes adding slots to the group of wide lines to reduce spacing between each of the wide lines, reduce a width of each of the wide lines, and increase a number of wide lines in the group of wide lines, while maintaining a density of the wide lines substantially the same subsequent to adding slots to the at least one area.
8. The method of claim 1 , wherein the patterned material includes a metal.
9. The method of claim 8 , wherein the metal includes copper.
10. A method of implementing polishing uniformity control for a material on a substrate to be polished, said method comprising: constructing an overburden distribution of a pattern on the substrate as a function of layout data of the pattern; identifying from the overburden distribution at least one area of the pattern as a function of overburden that has an overburden lower than a threshold amount, the at least one area further being of a given density; and modifying the layout data as a function of the at least one area, wherein modifying the layout data includes adding slots to the at least one area and concurrently maintaining a density of the at least one area to be substantially the same subsequent to modifying the layout data of the pattern.
11. A method for modifying layout data of a material on a substrate for improving a polishing uniformity of the material on the substrate during a polishing of the same, said method comprising: identifying at least one location within the layout data having wide lines; identifying, as a function of the at least one location of wide lines, wide lines collected together; determining whether the wide lines collected together have an overburden below a given threshold; and responsive to a determination that the wide lines collected together have an overburden below the given threshold, modifying the layout to have a larger overburden while maintaining a substantially same density of the wide lines collected together.
12. The method of claim 11 , wherein the wide lines include lines greater than approximately 5 μm in width, and wherein the group of wide lines collected together include wide lines collected to greater than approximately fifty percent (50%) density in greater than an area having approximately 50 microns in width and approximately 50 microns in length.
13. The method of claim 11 , wherein overburden is determined as a function of a plating model of the material.
14. The method of claim 11 , wherein determining whether the wide lines collected together have an overburden below a given threshold further comprises determining the overburden as a function of a plating model for plating of the material on the substrate.
15. The method of claim 11 , wherein modifying the layout data further comprises adding slots to the wide lines collected together for increasing the overburden above the given threshold and concurrently maintaining substantially the same density as that of the material of the wide lines collected together.
16. The method of claim 11 , wherein the material includes a metal.
17. The method of claim 16 , wherein the metal includes copper, and wherein a pattern of copper according to the modified layout data is designed for being planarization by chemical mechanical polishing (CMP).
18. The method of claim 11 , wherein the wide lines collected together comprise at least one of the group consisting of power bus lines and ground bus lines.
19. The method of claim 11 , wherein the layout data is used for creating a the material on the substrate to be polished via chemical-mechanical polishing (CMP).
20. The method of claim 11 , wherein the slots added to the wide lines collected together act to reduce spacing between each of the wide lines, reduce a width of each of the wide lines, and increase a number of wide lines and concurrently maintain substantially the same density of material.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
November 4, 2003
December 5, 2006
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