Patentable/Patents/US-7149986
US-7149986

Automated load determination for partitioned simulation

PublishedDecember 12, 2006
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

A method and device for automatically generating load circuits for a netlist. A computer system having a schematic for a circuit is used to create a netlist. While constructing the netlist, instances are checked for directives. The directives indicate that the instance should be tracked as a load circuit. For the instances having such a directive, their nets are flagged and the hierarchal portion of the circuit attached to the flagged nets is flattened. The resulting flat circuit replaces the instance in the netlist as a load circuit.

Patent Claims
25 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A method for forcing a voltage value on an output pin in a netlist, the method comprising: checking an instance in a circuit for a directive indicating that a plurality of the nets attached to the instance should be forced to a specific voltage in the netlist, wherein the instance is one of a plurality of instances connected by a plurality of nets in a schematic file representing the circuit; abstracting a plurality of terminals and a plurality of voltage values from the directive of the instance; generating a voltage source for each of the plurality of terminals, wherein the voltage source corresponds to the plurality of abstracted terminals and the plurality of abstracted voltage values; and adding the voltage sources to the netlist.

2

2. The method of claim 1 further comprising: assembling a list of the plurality of outputs from the plurality of instances that drive other pins.

3

3. The method of claim 1 further comprising: checking the plurality of nets attached to the instance for output nets that drive other pins.

4

4. The method of claim 1 , further comprising: abstracting a plurality of terminals and a plurality of voltage values from a property list of the instance.

5

5. A voltage regulator device for forcing a voltage value on an output pin in a netlist, the voltage regulator device comprising: a directive checker for checking an instance in a circuit for a directive indicating that a plurality of the nets attached to the instance should be forced to a specific voltage in the netlist, wherein the instance is one of a plurality of instances connected by a plurality of nets in a schematic file representing the circuit; a directive abstractor for abstracting a plurality of terminals and a plurality of voltage values from the directive of the instance; a voltage creator for generating a voltage source for each of the plurality of terminals, wherein the voltage source corresponds to the plurality of abstracted terminals and the plurality of abstracted voltage values; and a netlist writer for adding the voltage sources to the netlist.

6

6. The voltage regulator device of claim 5 further comprising: a net checker for checking the plurality of nets attached to the instance for output nets which drive other pins.

7

7. The voltage regulator device of claim 5 , further comprising: a directive abstractor for abstracting a plurality of terminals and a plurality of voltage values from a property list of the instance.

8

8. A voltage regulator device, comprising a computer readable medium having computer readable program code embodied thereon, the computer readable program code, when executed, implementing on a computer a method for forcing a voltage value on an output pin in a netlist, the method comprising: checking an instance in a circuit for a directive indicating that a plurality of the nets attached to the instance should be forced to a specific voltage in the netlist, wherein the instance is one of a plurality of instances connected by a plurality of nets in a schematic file representing the circuit; abstracting a plurality of terminals and a plurality of voltage values from the directive of the instance; generating a voltage source for each of the plurality of terminals, wherein the voltage source corresponds to the plurality of abstracted terminals and the plurality of abstracted voltage values; and adding the voltage sources to the netlist.

9

9. A computer readable medium having a computer readable program embodied thereon, the computer readable program code, when executed, implementing on a computer a method for forcing an voltage value on an output pin in a netlist, the method comprising: checking an instance in a circuit for a directive indicating that a plurality of the nets attached to the instance should be forced to a specific voltage in the netlist, wherein the instance is one of a plurality of instances connected by a plurality of nets in a schematic file representing the circuit; abstracting a plurality of terminals and a plurality of voltage values from the directive of the instance, generating a voltage source for each of the plurality of terminals, wherein the voltage source corresponds to the plurality of abstracted terminals and the plurality of abstracted voltage values; and adding the voltage sources to the netlist.

10

10. The computer readable medium having a computer readable program of claim 9 further comprising: abstracting a plurality of terminals and a plurality of voltage values from a property list of the instance.

11

11. A computerized method for forcing a voltage value on an output net in a netlist, the computerized method comprising: checking an instance in a circuit for a directive indicating that a plurality of the nets attached to the instance should be forced to a specific voltage in the netlist, wherein the instance is one of a plurality of instances connected by a plurality of nets in a schematic file representing the circuit; abstracting a plurality of terminals and a plurality of voltage values from the directive of the instance; generating a voltage source for each of the plurality of terminals, wherein the voltage source corresponds to the plurality of abstracted terminals and the plurality of abstracted voltage values; and adding the voltage sources to the netlist.

12

12. The computerized method of claim 11 , further comprising: assembling a list of the plurality of outputs from the plurality of instances that drive other pins.

13

13. The computerized method of claim 11 further comprising: checking the plurality of nets attached to the instance for output nets that drive other pins.

14

14. The computerized method of claim 11 further comprising: abstracting a plurality of terminals and a plurality of voltage values from a property list of the instance.

15

15. A computerized method comprising: receiving a schematic for a circuit; and generating through computer-automated operations a voltage value on an output pin in a netlist; modifying the netlist based on the generated voltage value so that during a simulation the netlist causes a simulator to simulate only a portion of the circuit while retaining a load of the entire circuit.

16

16. The computerized method of claim 15 , wherein generating through computer automated operations further comprises checking whether a plurality of output nets attached to the instance drive other pluralities of pins.

17

17. The computerized method of claim 16 , wherein generating through computer-automated operations further comprises: checking an instance in a circuit for a directive indicating that a plurality of the nets attached to the instance should be forced to a specific voltage in the netlist, wherein the instance is one of a plurality of instances connected by a plurality of nets in a schematic file representing the circuit.

18

18. The computerized method of claim 17 , wherein generating through computer-automated operations further comprises: abstracting a plurality of terminals and a plurality of voltage values from the directive of the instance.

19

19. The computerized method of claim 18 , wherein generating through computer-automated operations further comprises: generating a voltage source for each of the plurality of terminals, wherein the voltage source corresponds to the plurality of abstracted terminals and the plurality of abstracted voltage values.

20

20. The computerized method of claim 19 , wherein generating through computer-automated operations further comprises: adding the voltage source for each of the plurality of terminals to the netlist.

21

21. The computerized method of claim 15 , wherein generating through computer-automated operations further comprises: storing a new power supply device in the circuit.

22

22. A computerized method for generating a voltage value on an output net in a netlist, the method comprising: checking an instance in a circuit for a directive indicating that a plurality of the nets attached to the instance should be forced to a specific voltage in the netlist, wherein the instance is one of a plurality of instances connected by a plurality of nets in a schematic file representing the circuit; and generating a voltage source for each of a plurality of terminals, wherein the voltage source corresponds to a plurality of abstracted terminals and a plurality of abstracted voltage values.

23

23. The computerized method of claim 22 , further comprising: assembling from the plurality of instances a list of a plurality of output nets that drive other pins.

24

24. The computerized method of claim 22 , further comprising: checking the plurality of nets attached to the instance for output nets that drive other pins.

25

25. The computerized method of claim 22 , further comprising: abstracting the plurality of terminals and the plurality of voltage values from a property list of the instance.

Classification Codes (CPC)

Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.

Patent Metadata

Filing Date

April 22, 2003

Publication Date

December 12, 2006

Want to explore more patents?

Browse 5M+ US patents with plain-English claim translations and AI-generated analysis.

Citation & reuse

Analysis on this page is generated by Patentable — an AI-powered patent intelligence platform. AI-generated summaries, explanations, and analysis may be reused with attribution and a visible link back to the canonical URL below. Patent abstracts and claims are USPTO public domain.

Cite as: Patentable. “Automated load determination for partitioned simulation” (US-7149986). https://patentable.app/patents/US-7149986

© 2026 Patentable. All rights reserved.

Patentable is a research and drafting-assistant tool, not a law firm, and does not provide legal advice. Documents we generate are drafts for review by a licensed patent attorney.