A process for making a plurality of leadless packages is disclosed. Firstly, chips are attached onto a lead frame with a first metal layer formed thereon. After a wire bonding step and an encapsulating step are conducted, a portion of each lead of the lead frame is etched away to form a first connection pad and a second connection pad which are separated from each other but are still electrically connected to each other via the first metal layer therebetween. Then, a second metal layer is electroplated on the connection pads and the die pads by using the first metal layer as an electrical path. Finally, the first metal layer between the first connection pads and the second connection pads is removed, and a singulation step is conducted to complete the process. The present invention further provides a new lead frame design.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A process for making a plurality of leadless semiconductor packages, comprising the steps of: providing a lead frame having opposing upper and lower surfaces, the lead frame including a plurality of units in an array arrangement, a plurality of dambars between the units, and a first metal layer formed on the entire upper surface of the lead frame wherein each unit includes a die pad and a plurality of leads; attaching a plurality of chips onto the die pads of the lead frame, wherein each of the chips has a plurality of bonding pads on an active surface thereof; electrically coupling each lead of the lead frame to two different bonding pads of one of the chips; encapsulating the chips against the upper surface of the lead frame to form a molded product; selectively etching away a portion of each lead of the lead frame to form a first connection pad and a second connection pad which are separated from each other but are still electrically connected to each other via the first metal layer therebetween; electroplating a second metal layer on the first connection pads, the second connection pads and the die pads exposed from the bottom of the molded product by using the first metal layer as an electrical path; removing the first metal layer located between the first connection pads and the second connection pads such that the first connection pads are electrically isolated from the second connection pads; and conducting a singulation step to obtain the leadless semiconductor packages.
2. The process as claimed in claim 1 , further comprising the steps of attaching a tape onto the lower surface of the lead frame before the chips is encapsulated against the lead frame, and removing the tape from the bottom of the molded product.
3. The process as claimed in claim 1 , wherein the step of selectively etching away a portion of each lead of the lead frame includes the steps of: forming a photoresist pattern on the bottom of the molded product such that the entire lower surface of the lead frame is covered with photoresist pattern except the portion of each lead of the lead frame to be etched; and etching the lower surface of the lead frame with the photoresist pattern as mask such that the exposed portion of each lead is etched away while the first metal layer remains substantially intact.
4. The process as claimed in claim 1 , wherein the step of removing the first metal layer located between the first connection pads and the second connection pads is accomplished by a laser.
5. The process as claimed in claim 1 , wherein the step of removing the first metal layer located between the first connection pads and the second connection pads is accomplished by a water jet.
6. The process as claimed in claim 1 , wherein the upper surface of the leads is substantially flat and no concave portion is provided thereon.
7. The process as claimed in claim 1 , further comprising a step of selectively etching away the dambars of the lead frame to form a plurality of grooves wherein the singulation step is performed by cutting along the grooves.
8. The process as claimed in claim 7 , wherein the step of selectively etching away the dambars of the lead frame includes the steps of: forming a photoresist pattern on the bottom of the molded product such that the entire lower surface of the lead frame is covered with the photoresist pattern except the dambars; and etching the lower surface of the lead frame with the photoresist pattern as mask such that the dambars are etched away while the first metal layer remains substantially intact.
9. The process as claimed in claim 1 , wherein the first metal layer comprises a layer of silver.
10. The process as claimed in claim 1 , wherein the second metal layer comprises a layer of tin/lead.
11. A process for making a plurality of leadless semiconductor packages, comprising the steps of: providing a lead frame having opposing upper and lower surfaces, the lead frame including a plurality of units in an array arrangement, a plurality of dambars between the units, and a first metal layer formed on the entire upper surface of the lead frame wherein each unit includes a die pad, a plurality of tie bars for connecting the die pad to the dambars, a plurality of outer leads each connected to one of the dambars, and a plurality of inner leads disposed between the outer leads and the die pad wherein the inner leads are connected to each other and the tie bars; attaching a plurality of chips onto the die pads of the lead frame; electrically coupling the chips to the outer leads and the inner leads of the lead frame; encapsulating the chips against the upper surface of the lead frame to form a molded product; selectively etching away the connecting portions between the inner leads of the lead frame such that the inner leads are separated from each other but are still electrically connected to each other via the first metal layer therebetween; electroplating a second metal layer on the outer leads, the inner leads and the die pads exposed from the bottom of the molded product by using the first metal layer as an electrical path; removing the first metal layer located between the inner pads such that the inner leads are electrically isolated from each other; and conducting a singulation step to obtain the leadless semiconductor packages.
12. The process as claimed in claim 11 , further comprising the steps of attaching a tape onto the lower surface of the lead frame before the chips is encapsulated against the lead frame, and removing the tape from the bottom of the molded product.
13. The process as claimed in claim 11 , wherein the step of selectively etching away the connecting portions between the inner leads of the lead frame includes the steps of: forming a photoresist pattern on the bottom of the molded product such that the entire lower surface of the lead frame is covered with photoresist pattern except the connecting portions between the inner leads of the lead frame; and etching the lower surface of the lead frame with the photoresist pattern as mask such that the connecting portions are etched away while the first metal layer remains substantially intact.
14. The process as claimed in claim 11 , further comprises the steps of selectively etching away the connecting portions between the inner leads and the tie bars, and removing the first metal layer located between the inner leads and the tie bars such that the inner leads and the tie bars are electrically isolated from each other.
15. The process as claimed in claim 14 , wherein the connecting portions between the inner leads of the lead frame as well as between the inner leads and the tie bars are selectively etched away by the steps of: forming a photoresist pattern on the bottom of the molded product such that the entire lower surface of the lead frame is covered with photoresist pattern except the connecting portions between the inner leads of the lead frame as well as between the inner leads and the tie bars; and etching the lower surface of the lead frame with the photoresist pattern as mask such that the connecting portions are etched away while the first metal layer remains substantially intact.
16. The process as claimed in claim 11 , wherein the step of removing the first metal layer located between the inner pads is accomplished by a laser.
17. The process as claimed in claim 11 , wherein the step of removing the first metal layer located between the inner pads is accomplished by a water jet.
18. The process as claimed in claim 11 , wherein the upper surface of the leads is substantially flat and no concave portion is provided thereon.
19. The process as claimed in claim 11 , further comprising a step of selectively etching away the dambars of the lead frame to form a plurality of grooves wherein the singulation step is performed by cutting along the grooves.
20. The process as claimed in claim 11 , wherein the step of selectively etching away the dambars of the lead frame includes the steps of: forming a photoresist pattern on the bottom of the molded product such that the entire lower surface of the lead frame is covered with the photoresist pattern except the dambars; and etching the lower surface of the lead frame with the photoresist pattern as mask such that the dambars are etched away while the first metal layer remains substantially intact.
21. The process as claimed in claim 11 , wherein the first metal layer comprises a layer of silver.
22. The process as claimed in claim 11 , wherein the second metal layer comprises a layer of tin/lead.
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August 11, 2004
January 30, 2007
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