A high performance thermally enhanced package and method of fabricating the same is provided. A chip (a wire bond chip or a flip chip) and a carrier (lead frame or tape carrier) are bonded together using flip-chip technology and thermal compression. The chip and the carrier are encapsulated using a molding compound. The package has a smaller overall size and the capacity to withstand electromagnetic interference.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A high performance thermally enhanced package, comprising: a heat sink having a cavity thereon; a carrier on the heat sink, wherein the carrier has a cavity in a location corresponding to the cavity in the heat sink for accommodating a chip, wherein the chip is a flip chip; a layer of adhesive glue between the heat sink and the carrier, wherein the adhesive glue layer has a plurality of openings therein; a first electrical contact inside each opening such that the carrier and the heat sink is electrically connected; a chip positioned inside the chip cavity above the heat sink, wherein the chip has an active surface with a plurality of bonding pads thereon; and a plurality of second electrical contacts between the bonding pads and the carrier such that the chip and the carrier are electrically connected.
2. The package of claim 1 , wherein the carrier is a lead frame comprising: a die pad; and a plurality of leads surrounding the die pad, wherein each lead can be divided into an inner lead section and an outer lead section, and the die pad and the outer leads are on a different plane to form the chip cavity for accommodating the chip.
3. The package of claim 2 , wherein the die pad is electrically connected to the heat sink through the first electrical contacts.
4. The package of claim 2 , wherein a portion of the leads is electrically connected to the heat sink through the first electrical contacts.
5. The package of claim 2 , wherein the package further includes another layer of adhesive glue between the die pad and the active surface of the chip.
6. The package of claim 1 , wherein the carrier is a tape carrier comprising: a tape; a die pad on the tape; and a plurality of leads surrounding the die pad, wherein each lead can be divided into an inner lead section and an outer lead section, and the die pad and the outer leads are on different planes to form the cavity for accommodating the chip.
7. The package of claim 6 , wherein the die pad is electrically connected to the heat sink through the first electrical contacts.
8. The package of claim 6 , wherein a portion of the leads is electrically connected to the heat sink through the first electrical contacts.
9. The package of claim 6 , wherein the package may further include another layer of adhesive glue between the die pad and the active surface of the chip.
10. The package of claim 1 , wherein the package may further include a plastic package body filling up the chip cavity so that the chip and the cavity carrier form a solid body.
11. A high performance thermally enhanced package, comprising: a heat sink having a cavity thereon; a carrier on the heat sink, wherein the carrier has a cavity in a location corresponding to the cavity in the heat sink for accommodating a chip; a layer of adhesive glue between the heat sink and the carrier, wherein the adhesive glue layer has a plurality of openings therein; a first electrical contact inside each opening such tat the carrier and the heat sink is electrically connected; a chip positioned inside the chip cavity above the heat sink, wherein the chip has an active surface with a plurality of bonding pads thereon; and a plurality of second electrical contacts between the bonding pads and the carrier such that the chip and the cater are electrically connected, wherein the cater is a lead frame comprising: a die pad; and a plurality of leads surrounding the die pad, wherein each lead can be divided into an inner lead section and an outer lead section, and the die pad and the outer leads are on a different plane to form the chip cavity for accommodating the chip.
12. The package of claim 11 , wherein the die pad is electrically connected to the heat sink through the first electrical contacts.
13. The package of claim 11 , wherein a portion of the leads is electrically connected to the heat sink through the first electrical contacts.
14. The package of claim 11 , wherein the package further includes another layer of adhesive glue between the die pad and the active surface of the chip.
15. The package of claim 11 , wherein the chip is a wire bond chip.
16. The package of claim 11 , wherein the chip is a flip chip.
17. The package of claim 11 , wherein the package may further include a plastic package body filling up the chip cavity so that the chip and the cavity carrier form a solid body.
18. A high performance thermally enhanced package, comprising: a heat sink having a cavity thereon; a carrier on the heat sink, wherein the carrier has a cavity in a location corresponding to the cavity in the heat sink for accommodating a chip; a layer of adhesive glue between the heat sink and the carrier, wherein the adhesive glue layer has a plurality of openings therein; a first electrical contact inside each opening such that the carrier and the heat sink is electrically connected; a chip positioned inside the chip cavity above the heat sink, wherein the chip has an active surface with a plurality of bonding pads thereon; and a plurality of second electrical contacts between the bonding pads and the carrier such that the chip and the carrier are electrically connected wherein the carrier is a tape carrier comprising: a tape; a die pad on the tape; and a plurality of leads surrounding the die pad, wherein each lead can be divided into an inner lead section and an outer lead section, and the die pad and the outer leads are on different planes to form the cavity for accommodating the chip.
19. The package of claim 18 , wherein the die pad is electrically connected to the heat sink through the first electrical contacts.
20. The package of claim 18 , wherein a portion of the leads is electrically connected to the heat sink through the first electrical contacts.
21. The package of claim 18 , wherein the package may further include another layer of adhesive glue between the die pad and the active surface of the chip.
22. The package of claim 18 , wherein the chip is a wire bond chip.
23. The package of claim 18 , wherein the chip is a flip chip.
24. The package of claim 18 , wherein the package may further include a plastic package body filling up the chip cavity so that the chip and the cavity carrier form a solid body.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
February 18, 2003
February 6, 2007
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