A method and apparatus for controlling a voltage generator of a memory device are provided. A temperature of the memory device is measured. If the measured temperature is outside a threshold temperature range, the memory device is allowed to be placed in a clocked standby mode (CSM), whereby the voltage generator is selectively enabled with a clock signal. If the measured temperature is within a threshold temperature range, the memory device is prevented from being placed in the clocked standby mode (CSM).
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method for controlling a voltage generator for a memory device, the method comprising: measuring a temperature of the memory device; if the measured temperature is outside a threshold temperature range, allowing the memory device to be placed in a clocked standby mode (CSM), whereby the voltage generator is selectively enabled with a clock signal; and if the measured temperature is within a threshold temperature range, preventing the memory device from being placed in the clocked standby mode (CSM).
2. The method of claim 1 , wherein the threshold range is any temperature above a threshold temperature.
3. The method of claim 1 , wherein the period of the clock signal is chosen such that the voltage output by the generator does not fall below a threshold voltage within the period.
4. The method of claim 1 , wherein the temperature range is chosen such that the temperature range includes temperatures at which the clock frequency is above a critical frequency.
5. A memory device comprising: a voltage generation circuit configured to maintain a voltage; a control circuit configured to selectively enabled the voltage generation circuit by: measuring a temperature of the memory device; if the measured temperature is outside a threshold temperature range, placing the memory device in a clocked standby mode (CSM), whereby the voltage generator is selectively enabled with a clock signal; and if the measured temperature is within a threshold temperature range, preventing the memory device from being placed in the clocked standby mode (CSM).
6. The memory device of claim 5 , wherein the threshold range is any temperature above a threshold temperature.
7. The memory device of claim 5 , wherein the period of the clock signal is chosen such that the voltage output by the voltage generation circuit does not fall below a threshold voltage within the period.
8. The memory device of claim 5 , wherein the temperature range is chosen such that the temperature range includes temperatures at which the clock frequency is above a critical frequency.
9. A method for controlling a voltage generator for a memory device, the method comprising: disabling a clocked standby mode (CSM), whereby the voltage generator is selectively enabled in conjunction with a clock signal, if a measured temperature of the memory device is within a threshold temperature range.
10. The method of claim 9 , wherein disabling the clocked standby mode comprises setting the clock signal to a low logic level while the measured temperature of the memory device is within the threshold temperature range.
11. The method of claim 9 , wherein the threshold temperature range is any temperature above a threshold temperature.
12. The method of claim 9 , wherein a period of the clock signal is chosen such that the voltage output by the generator does not fall below a threshold voltage within the period.
13. The method of claim 9 , wherein the threshold temperature range is chosen such that the temperature range includes temperatures at which a clock frequency of the clock signal is above a critical frequency.
14. An integrated circuit, comprising: a temperature sensor; a voltage generation circuit; and control circuitry configured to: measure a temperature of the integrated circuit with the temperature sensor; disable a clocked standby mode (CSM), whereby the voltage generation circuit is selectively enabled in conjunction with a clock signal, if a the measured temperature of the integrated circuit is within a threshold temperature range.
15. The integrated circuit of claim 14 , wherein disabling the clocked standby mode comprises setting the clock signal to a low logic level while the measured temperature of the memory device is within the threshold temperature range.
16. The integrated circuit of claim 14 , wherein the threshold temperature range is any temperature above a threshold temperature.
17. The integrated circuit of claim 14 , wherein a period of the clock signal is chosen such that the voltage output by the voltage generation circuit does not fall below a threshold voltage within the period.
18. The integrated circuit of claim 14 , wherein the threshold temperature range is chosen such that the temperature range includes temperatures at which a clock frequency of the clock signal is above a critical frequency.
19. A memory device comprising: a means for generating a voltage; and a means for selectively enabling the means for generating by: measuring a temperature of the memory device; if the measured temperature is outside a threshold temperature range, placing the memory device in a clocked standby mode (CSM), whereby the means for generating is selectively enabled with a clock signal; and if the measured temperature is within a threshold temperature range, preventing the memory device from being placed in the clocked standby mode (CSM).
20. The memory device of claim 19 , wherein the temperature range is chosen such that the temperature range includes temperatures at which the clock frequency is above a critical frequency.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
July 22, 2005
February 13, 2007
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